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| 型号： | DMA-MC-XM-N3 |
| 厂商： | Lattice Semiconductor Corporation |
| 文件页数： | 21/28页 |
| 文件大小： | 0K |
| 描述： | IP CORE MCDMA CTLR XP LATTICEXP |
| 标准包装： | 1 |
| 系列： | * |
| 其它名称： | DMAMCXMN3 |
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Lattice Semiconductor
Multi-Channel DMA Controller User’s Guide
Command Register
This register controls the operation of the core. This register is 4 bits wide in the non-8237 mode. A reset or master
clear clears the register. Table 13 lists the functions of this register for the non-8237 mode.
Mode Register (Non- 8237 Mode)
Each channel has an 8-bit mode register. Table 14 lists the format of the mode register in the non-8237 mode. Pro-
gramming the corresponding increment and decrement bits to the same value can hold the source or destination
address constant.
Channel Control Register
This register is visible in the non-8237 mode. Each channel has one channel control register. Table 15 lists the reg-
ister’s format. A reset or a master clear resets the request and sets the mask. This masks the channel’s hardware
requests. Auto-initialization is disabled upon a reset.
Table 13. Command Register – Non-8237 Mode
Bit
Description
0
0
1
Controller enable
Controller disable
1
2
Reserved. This bit is always 0
Reserved. This bit is always 0
3
0
1
dack active low
dack active high
Table 14. Mode Register – Non-8237 Mode
Bit
Description
0
1
2
3
4
5
7:6
0
1
0
1
X
0
1
0
1
0
1
0
1
00
01
10
11
Memory-to-memory disable
Memory-to-memory enable
Write transfer
Read transfer
If bit0=1
Increment Source Address disable
Increment Source Address enable
Decrement Source Address disable
Decrement Source Address enable
Increment Destination Address disable
Increment Destination Address enable
Decrement Destination Address disable
Decrement Destination Address enable
Demand mode select
Single mode select
Block mode select
Illegal
Note: Bits 2 and 3 are mutually exclusive. They cannot be enabled
at the same time since the address will either increment or decre-
ment. This also applies to Bits 4 and 5.
21
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| DMA-MC-XP-N2 | 功能描述:数字信号处理器和控制器 - DSP, DSC DMA Controller RoHS:否 制造商:Microchip Technology 核心:dsPIC 数据总线宽度:16 bit 程序存储器大小:16 KB 数据 RAM 大小:2 KB 最大时钟频率:40 MHz 可编程输入/输出端数量:35 定时器数量:3 设备每秒兆指令数:50 MIPs 工作电源电压:3.3 V 最大工作温度:+ 85 C 封装 / 箱体:TQFP-44 安装风格:SMD/SMT |
| DM-A-PP | 制造商:DDK 制造商全称:DDK Ltd. 功能描述:Conversion Connector |
| DMA-SG-E3-U1 | 功能描述:开发软件 DMA Scatter/Gather RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| DMA-SG-E3-UT1 | 功能描述:开发软件 DMA SCATTER/GATHER USER CONFIGURABLE RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| DMA-SG-P2-U1 | 功能描述:开发软件 DMA Scatter/Gather RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
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