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| 型号： | DP83848CVV/NOPB |
| 厂商： | National Semiconductor |
| 文件页数： | 24/86页 |
| 文件大小： | 0K |
| 描述： | IC TXRX ETHERNET PHYTER 48-LQFP |
| 产品培训模块： | PHYTER® Family |
| 标准包装： | 250 |
| 类型： | 收发器 |
| 驱动器/接收器数： | 1/1 |
| 规程： | 以太网 |
| 电源电压： | 3 V ~ 3.6 V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-LQFP |
| 供应商设备封装： | 48-LQFP（7x7） |
| 包装： | 托盘 |
| 产品目录页面： | 1276 (CN2011-ZH PDF) |
| 配用： | DP83848C-POE-EK-ND - BOARD EVALUATION DP83848C DP83848C-MAU-EK-ND - BOARD EVALUATION DP83848C |
| 其它名称： | *DP83848CVV *DP83848CVV/NOPB DP83848CVV DP83848CVVNOPB DP83848CVVNOPB-ND DP83848CVVNOPBTR DP83848CVVNOPBTR-ND |
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4.2.2.2 Base Line Wander Compensation
The DP83848C is completely ANSI TP-PMD compliant and
includes Base Line Wander (BLW) compensation. The
BLW compensation block can successfully recover the TP-
PMD defined “killer” pattern.
BLW can generally be defined as the change in the aver-
age DC content, relatively short period over time, of an AC
coupled digital transmission over a given transmission
medium. (i.e., copper wire).
BLW results from the interaction between the low fre-
quency components of a transmitted bit stream and the fre-
quency response of the AC coupling component(s) within
the transmission system. If the low frequency content of
the digital bit stream goes below the low frequency pole of
the AC coupling transformers then the droop characteris-
tics of the transformers will dominate resulting in potentially
serious BLW.
The digital oscilloscope plot provided in Figure 9 illustrates
the severity of the BLW event that can theoretically be gen-
erated during 100BASE-TX packet transmission. This
event consists of approximately 800 mV of DC offset for a
period of 120
s. Left uncompensated, events such as this
can cause packet loss.
4.2.3 Signal Detect
The signal detect function of the DP83848C is incorporated
to meet the specifications mandated by the ANSI FDDI TP-
PMD Standard as well as the IEEE 802.3 100BASE-TX
Standard for both voltage thresholds and timing parame-
ters.
Note that the reception of normal 10BASE-T link pulses
and fast link pulses per IEEE 802.3u Auto-Negotiation by
the 100BASE-TX receiver do not cause the DP83848C to
assert signal detect.
4.2.4 MLT-3 to NRZI Decoder
The DP83848C decodes the MLT-3 information from the
Digital Adaptive Equalizer block to binary NRZI data.
4.2.5 NRZI to NRZ
In a typical application, the NRZI to NRZ decoder is
required in order to present NRZ formatted data to the
descrambler.
4.2.6 Serial to Parallel
The 100BASE-TX receiver includes a Serial to Parallel
converter which supplies 5-bit wide data symbols to the
PCS Rx state machine.
Figure 9. 100BASE-TX BLW Event
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相关代理商/技术参数 |
参数描述 |
|---|---|
| DP83848CVVX | 制造商:Texas Instruments 功能描述:PHY 1-CH 10Mbps/100Mbps 48-Pin LQFP T/R |
| DP83848CVVX/NOPB | 功能描述:以太网 IC PHYTER COMMERCIAL TEMP SGL PORT RoHS:否 制造商:Micrel 产品:Ethernet Switches 收发器数量:2 数据速率:10 Mb/s, 100 Mb/s 电源电压-最大:1.25 V, 3.45 V 电源电压-最小:1.15 V, 3.15 V 最大工作温度:+ 85 C 封装 / 箱体:QFN-64 封装:Tray |
| DP83848EVV/NOPB | 功能描述:以太网 IC RoHS:否 制造商:Micrel 产品:Ethernet Switches 收发器数量:2 数据速率:10 Mb/s, 100 Mb/s 电源电压-最大:1.25 V, 3.45 V 电源电压-最小:1.15 V, 3.15 V 最大工作温度:+ 85 C 封装 / 箱体:QFN-64 封装:Tray |
| DP83848EVVX/NOPB | 功能描述:以太网 IC 10/100 ETHERNET PHY RoHS:否 制造商:Micrel 产品:Ethernet Switches 收发器数量:2 数据速率:10 Mb/s, 100 Mb/s 电源电压-最大:1.25 V, 3.45 V 电源电压-最小:1.15 V, 3.15 V 最大工作温度:+ 85 C 封装 / 箱体:QFN-64 封装:Tray |
| DP83848H | 制造商:NSC 制造商全称:National Semiconductor 功能描述:DP83848H PHYTER㈢ Mini - Extreme Single 10/100 Ethernet |
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