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参数资料
| 型号： | DP83957VF |
| 英文描述： | REPEATER MANAGEMENT|QFP|80PIN|PLASTIC |
| 中文描述： | 直放站管理| QFP封装| 80脚|塑料 |
| 文件页数： | 3/24页 |
| 文件大小： | 240K |
| 代理商： | DP83957VF |
50 Functional Description (Continued)
aAlignmentError
This counts the number of frames detected on each port
with a FCS error and a framing error The counter incre-
ments by one for each frame where the FCSError and Fram-
ingError signals are asserted and CollisionEvent de-assert-
ed In addition to this the OctetCount must be greater than
or equal to the MinFrameSize and less than or equal to the
maxFrameSize This is a 32-bit counter
aFramesTooLong
This counts the number of frames that exceed the max-
FrameSize The counter increments by one for each frame
where OctetCount is greater than the maxSizeFrame and
which does not have an Alignment or FCSError This is a
32-bit counter
aShortEvents
This counts the number of frames that has CarrierEvent with
ActivityDuration less than the ShortEventMaxTime The
ShortEventMaxTime is greater than 74 bits but less than 82
bits This is a 32-bit counter
aRunts
This counter increments by one for each CarrierEvent with
ActivityDuration greater than the ShortEventMaxTime (74 –
82 bits) but less than the validPacketMinTime (64 bytes)
and with the CollisionEvent signal de-asserted This is a
32-bit counter
aCollisions
This counter increments by one for any CarrierEvent signal
asserted on any port in which the CollisionEvent signal on
this port is asserted
Note
Since the DP83957 can only keep track of PortN or the information
regarding the repeated packet this attribute should be kept in the
Port-Event Counter of the DP839502 This is a 32-bit counter
aLateEvents
This counter increments by one for each CarrierEvent in
which the collision is detected after the LateEventThreshold
(480 – 565 bit times) has been reached in each frame This is
a 32-bit counter
aVeryLongEvents
This counter increments by one for each CarrierEvent
whose ActivityDuration is greater than the MAU jabber lock-
up protection timer This is a 32-bit counter
aDataRateMismatches
This counter increments by one if the frequency or data rate
of the received packet is detectably mismatched from the
local transmit frequency For this counter to increment the
following conditions must apply CollisionEvent is not as-
serted and the ActivityDuration is greater than the Valid-
PacketMinTime This is a 32-bit counter
aSourceAddressChange
This counter increments by one each time the Source Ad-
dress field of a ReadableFrame differs from the previous
received Source Address field on the same port This is a
32-bit counter
aLastSourceAddress
This attribute stores the SourceAddress value of the last
ReadableFrame received by this port This is a 48-bit buffer
525 Port Attribute Status
Port Attribute Status Registers 1 and 2 provide a snap-shot
of changes to a ports attribute(s) since the last CPU Read
access
These two registers minimize the number of CPU access
needed to obtain the Port’s attributes stored in the SRAM
They allow the microprocessor to read only those attributes
that have been updated since the last CPU access instead
of reading every attribute for a particular port
The CPU needs to clear the Port Attribute Status bits after a
read to these locations to guarantee that it has taken a snap
shot of the Port Attribute changes correctly
Any subsequent updates to any of the attributes by the
DP83957 management block will always set the appropriate
bits of the Port Attribute Status octets (refer to Sections
616 and 617)
526 Port Attribute Overflow
The attribute overflow condition is an important feature as it
can be used to monitor the frequency of occurrence of a
specific attribute This feature is intended to allow software
to set thresholds for an appropriate attribute and monitor
the frequency of the overflow condition
An attribute overflow occurs when the attribute counter rolls
over from 0xFF to 0x00 This condition is indicated by the
OVFL bit (D2) in the Interrupt Status Register The attribute
for which the counter has overflowed is specified in the
Overflow Status Register 2 (refer to Section 614 for the bit
definitions)
The DP83950 ID and Port ID associated with the overflow
condition is specified in Overflow Status Register 1 (refer to
Section 613)
11
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