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参数资料
| 型号： | DP83957VF |
| 英文描述： | REPEATER MANAGEMENT|QFP|80PIN|PLASTIC |
| 中文描述： | 直放站管理| QFP封装| 80脚|塑料 |
| 文件页数： | 6/24页 |
| 文件大小： | 240K |
| 代理商： | DP83957VF |
60 Register Description (Continued)
62 CONFIGURATION REGISTER 1
Configuration Register 1 provides the control to the microprocessor to allow the processor to read and write information into the
external SRAM
Reset State
0x00
Bit
Bit Name
Access
Bit Description
D7
START
RW
Setting this bit to a 1 will enable the DP83957 to start processing Port Attributes
D6
INT
RW
This bit enablesdisables the Interrupt pin When disabled the output is in place in TRI-STATE
0 Enable Interrupt
1 Disable Interrupt
D5
ST
WR
RW
By writinga1to this bit will allow the CPU to initiate a SRAM write
The DP83957 will reset this bit to 0 when it has completed a SRAM write
D4
ST
RD
RW
By writinga1to this bit will allow the CPU to initiate a SRAM read
The DP83957 will reset this bit to 0 when it has completed a SRAM read
D3
FILL
RW
Setting this bit to a 1 will fill the entire SRAM with the data pattern contained in the Write Data
Byte Register (0x22)
D2 – D0
RAC 20
RW
The CPU must write the number of bytes it needs to read from the SRAM into these 3 bits The
maximum number of bytes that can be read at any one time is 6
The number of bytes read from SRAM is buffered in the Read Data Byte Registers
63 CONFIGURATION REGISTER 2
Configuration Register 2 sets up the DP83957 for different versions of the Repeater Interface Controller (DP83950 or the Secure
DP83952) and different external SRAM parameters (ie access speeds and SRAM size)
This register must be set up during initialization
Reset State
0x00
Bit
Bit Name
Access
Bit Description
D7
SECURE
RW
This bit selects between a Secure or a Non-Secure Repeater Interface Controller which is
connected to the DP83957
0 Selects the Non-Secure Mode
1 Selects the Secure Mode
Note
This is only relevant for the DP83952 For the DP83950 this bit must be set to 0
D6
CLR
ATR
RW
An attribute will be reset to zero after the attribute is read from SRAM if this bit is set to 1
D5
RES
RW
This bit must always be set to 0
D4
SRAM
ACC
RW
This bit determines the access speed of the external SRAM
0 Selects an access speed of up to 25 ns
1 Selects an access speed of up to 45 ns
D3
SIZE
RW
This bit selects the size of the external SRAM The size will depend on whether one or two
DP83950’s are connected to the DP83957
0 Selects a 1024 byte SRAM
1 Selects a 2048 byte SRAM
D2 – D0
RES
Reserved
64 CONFIGURATION REGISTER 3
Configuration Register 3 is used to set-up the Management Interface between the DP83950(s) and the DP83957 The Repeater
Interface Controller (DP83950) allows the user to program the Management Carrier Sense (MCRS) signal to be either active
high or active low depending on the particular repeater design
Reset State
0x00
Bit
Bit Name
Access
Bit Description
D7 – D1
RES
Reserved
D0
MCRS
LEV
This bit selects the active signal level of the Management Carrier Sense signal
0 Active Low
1 Active High
14
相关PDF资料 |
PDF描述 |
|---|---|
| DP83959AVUL | LAN Hub Controller |
| DP83BC04BJ | Single 8-bit Bus Transceiver |
| DP83BC04BN | Single 8-bit Bus Transceiver |
| DP8400-2 | Error Detection & Correction (EDAC) |
| DP8455V-3 | Disk Data Separator/Synchronizer |
相关代理商/技术参数 |
参数描述 |
|---|---|
| DP83959 | 制造商:NSC 制造商全称:National Semiconductor 功能描述:8-Port Lite Ethernet Repeater Interface Controller |
| DP83959AVUL | 制造商:未知厂家 制造商全称:未知厂家 功能描述:LAN Hub Controller |
| DP83959VUL | 制造商:NSC 制造商全称:National Semiconductor 功能描述:8-Port Lite Ethernet Repeater Interface Controller |
| DP83BC04BJ | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Single 8-bit Bus Transceiver |
| DP83BC04BN | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Single 8-bit Bus Transceiver |
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