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参数资料
| 型号： | DPZ128X16IHY-17M |
| 厂商： | TWILIGHT TECHNOLOGY INC |
| 元件分类： | PROM |
| 英文描述： | 128K X 16 FLASH 12V PROM MODULE, 170 ns, QFP48 |
| 封装： | HERMETIC SEALED, CERAMIC, GULLWING, MODULE, SLCC-48 |
| 文件页数： | 11/16页 |
| 文件大小： | 1082K |
| 代理商： | DPZ128X16IHY-17M |
DPZ128X16IY/IIY/IJY/IHY/IA3
Dense-Pac Microsystems, Inc.
device, it indicates the location is erased. The erase/verify
command is issued prior to each location verification to latch
the address of the location to be verified. This continues until
FFH is not read from the device or the last address for the
device being erased is read.
If FFH is not read from the location being verified, an
additional erase operation is performed. Verification then
resumes from the last location verified. Once all locations in
the device being erased are verified, the erase operation is
complete. The verify operation should now be terminated by
writing a valid command such as program set-up to the
command register.
PRODUCT I.D. OPERATION:
The product I.D. operation outputs the manufacturer code
(89H) and the device code (B4H). This allows programming
equipment to match the device with the proper erase and
programming algorithms.
With CE and OE at a logic low level, raising A9 to VID (see
DC Operating Characteristics)
will initiate the operation. The
manufacturer’s code can then be read from address location
0000H and the device code can be read from address
location 0001H.
The I.D. codes can also be accessed via the command
register. Following a write of 90H to the command register,
a read from address location 0000H outputs the
manufacturer’s code (89H). A read from address location
0001H outputs the device code (B4H). To terminate the
operation, it is necessary to write another valid command into
the register.
POWER UP/DOWN PROTECTION:
The FLASH devices are designed to protect against accidental
erasure or programming during power transitions. It makes
no difference as to which power supply, VPP or VDD, powers
up first. Power supply sequencing is not required. Internal
circuitry ensures that the command register is reset to the read
mode upon power up.
POWER SUPPLY DECOUPLING:
VPP traces should use trace widths and layout considerations
comparable to that of the VDD power bus. The VPP supply
traces should also be decoupled to help decrease voltage
spikes.
While the memory module has high-frequency,
low-inductance decoupling capacitors mounted on the
substrate connected to VDD and VSS, it is recommended that
a 4.7
F to 10F electrolytic capacitor be placed near the
memory module connected across VDD and VSS for bulk
storage. Decoupling capacitors should also be placed near
the module, connected across VPP and VSS.
COMMAND DEFINITION TABLE
Command
Bus
Cycles
Req’d
First Bus Cycle
Second Bus Cycle
Operation
Address
Data
1
Operation
Address
Data
1
Read Memory
1
Write
X
00H
-
Setup Erase / Erase
2
Write
X
20H
Write
X
20H
Erase Verify
2
Write
EA
A0H
Read
X
EVD
Setup Program / Program
2
Write
X
40H
Write
PA
PD
Program Verify
2
Write
X
C0H
Read
X
PVD
Reset
2
Write
X
FFH
Write
X
FFH
Read Product I.D. Codes
3
Write
X
90H
Read
IA
ID
EA = Address to Verify
PA = Address to Program
EVD = Data Read from Location EA
PD = Data to be Programmed at Location PA
IA
= Address: 0000H for manufacturing code, 0001H for device code
PVA = Data to be Read from Location PA at Program Verify
ID = ID data read from IA during product ID operation
(Manufacturer = 89H, Device = B4H)
TRUTH TABLE
Mode
Description
CEn
WE
OE
A0
A9
VPP
I/O Pins
Supply Current
READ
ONLY
Not Selected
H
X
VPPLO
HIGH-Z
Standby
Output Disable
L
H
X
VPPLO
HIGH-Z
Active
Read
L
H
L
A0
A9
VPPLO
DOUT
Active
I.D. (Mfr.)
L
H
L
VID
VPPLO
DOUT =89H
Active
I.D. (Device)
L
H
L
H
VID
VPPLO
DOUT = B4H
Active
COMMAND
PROGRAM
Not Selected
H
X
VPPHI
HIGH-Z
Standby
Output Disable
L
H
X
VPPHI
HIGH-Z
Active
Read
L
H
L
A0
A9
VPPHI
DOUT
Active
Write
L
H
A0
A9
VPPHI
DIN
Active
30A071-13
REV. D
4
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