参数资料
型号: DS1077U-133
厂商: DALLAS SEMICONDUCTOR
元件分类: Clock Generator
英文描述: 133.333 MHz, OTHER CLOCK GENERATOR, PDSO8
封装: 0.118 INCH, MICRO, SO-8
文件页数: 12/17页
文件大小: 103K
代理商: DS1077U-133
DS1077
4 of 17
Table 1
EN0
(BIT)
SEL0
(BIT)
PDN0
(BIT)
CTRL0
(PIN)
OUT0
(PIN)
CTRL0
FUNCTION
DEVICE
MODE
1
Hi-Z
POWER DOWN
000
0Hi-Z
POWER *
DOWN
ACTIVE
1
Master Clk/M
010
0Master Clk
MUX
SELECT
ACTIVE
1Hi-Z
100
0Master Clk
OUTPUT
ENABLE
ACTIVE
1Hi-Z
110
0
Master Clk/M
OUTPUT
ENABLE
ACTIVE**
1
Hi-Z
POWER DOWN
X0
1
0Master Clk
POWER
DOWN
ACTIVE
1
Hi-Z
POWER DOWN
X1
1
0
Master Clk/M
POWER
DOWN
ACTIVE
*This mode is for applications where OUT0 is not used, but CTRL0 is used as a device shutdown
**Default Condition
CONTROL PIN 1 (CTRL1) A multi-functional input pin that can be selected as a OUTPUT ENABLE
and/or a POWER DOWN. Its function is determined by the user-programmable control register value of
PDN1. (Refer to Table 2)
Table 2
PDN1
(bit)
CTRL1
(pin)
CTRL1
Function
OUT 1
DEVICE MODE
0
Output Enable
OUT CLK
ACTIVE
**
0
1
Output Enable
Hi-Z
ACTIVE
**
1
0
Power Down
OUT CLK
ACTIVE
1
Power Down
Hi-Z
POWER DOWN
**Default Condition
Note:
Both CTRL0 and CTRL1 can be configured as power downs, they are internally “OR” connected so that
either of the control pins may be used to provide a power down function for the whole device, subject to
appropriate settings of the PDN0 and PDN1 register bits. (Refer to Table 3)
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