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参数资料
| 型号： | DS1230ABL-100-IND |
| 英文描述： | NVRAM (Battery Based) |
| 中文描述： | NVRAM中（基于电池） |
| 文件页数： | 11/12页 |
| 文件大小： | 469K |
| 代理商： | DS1230ABL-100-IND |
DS1230Y/AB
8 of 12
POWER-DOWN/POWER-UP TIMING
(tA: See Note 10)
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
NOTES
CE, at VIH before Power-Down
tPD
0
s
11
VCC slew from VTP to 0V ( CE at VIH)
tF
300
s
VCC slew from 0V to VTP ( CE at VIH)
tR
300
s
CE
at VIH after Power-Up
tREC
2
125
ms
(tA=25
°C)
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
NOTES
Expected Data Retention Time
tDR
10
years
9
WARNING:
Under no circumstance are negative undershoots, of any amplitude, allowed when device is in battery
backup mode.
NOTES:
1.
WE
is high for a Read Cycle.
2. OE = VIH or VIL. If OE = VIH during write cycle, the output buffers remain in a high-impedance state.
3. tWP is specified as the logical AND of CE and WE . tWP is measured from the latter of CE or WE
going low to the earlier of CE or WE going high.
4. tDH, tDS are measured from the earlier of CE or WE going high.
5. These parameters are sampled with a 5 pF load and are not 100% tested.
6. If the CE low transition occurs simultaneously with or latter than the WE low transition, the output
buffers remain in a high-impedance state during this period.
7. If the CE high transition occurs prior to or simultaneously with the WE high transition, the output
buffers remain in high-impedance state during this period.
8. If WE is low or the WE low transition occurs prior to or simultaneously with the CE low transition,
the output buffers remain in a high-impedance state during this period.
9. Each DS1230 has a built-in switch that disconnects the lithium source until VCC is first applied by the
user. The expected tDR is defined as accumulative time in the absence of VCC starting from the time
power is first applied by the user.
10. All AC and DC electrical characteristics are valid over the full operating temperature range. For
commercial products, this range is 0
°C to 70°C. For industrial products (IND), this range is -40°C to
+85
°C.
11. In a power-down condition the voltage on any pin may not exceed the voltage on VCC.
12. tWR1 and tDH1 are measured from WE going high.
13. tWR2 and tDH2 are measured from CE going high.
14. DS1230 DIP modules are recognized by Underwriters Laboratory (U.L.
) under file E99151.
DS1230 PowerCap modules are pending U.L. review. Contact the factory for status.
相关PDF资料 |
PDF描述 |
|---|---|
| DS1230ABL-120 | NVRAM (Battery Based) |
| DS1230ABL-120-IND | NVRAM (Battery Based) |
| DS1230ABL-150 | NVRAM (Battery Based) |
| DS1230ABL-150-IND | NVRAM (Battery Based) |
| DS1230ABL-200 | NVRAM (Battery Based) |
相关代理商/技术参数 |
参数描述 |
|---|---|
| DS1230ABL-120 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:NVRAM (Battery Based) |
| DS1230ABL-120-IND | 制造商:未知厂家 制造商全称:未知厂家 功能描述:NVRAM (Battery Based) |
| DS1230ABL-150 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:NVRAM (Battery Based) |
| DS1230ABL-150-IND | 制造商:未知厂家 制造商全称:未知厂家 功能描述:NVRAM (Battery Based) |
| DS1230ABL-200 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:NVRAM (Battery Based) |
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