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参数资料
| 型号： | DS1330YP-100 |
| 厂商： | DALLAS SEMICONDUCTOR |
| 元件分类： | Static RAM |
| 英文描述： | 32K X 8 NON-VOLATILE SRAM MODULE, 100 ns, DMA34 |
| 封装： | POWERCAP MODULE-34 |
| 文件页数： | 9/11页 |
| 文件大小： | 218K |
| 代理商： | DS1330YP-100 |
DS1330Y/AB
7 of 11
POWER-DOWN/POWER-UP TIMING
(tA: See Note 10)
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
NOTES
VCC Fail Detect to CE and WE Inactive
tPD
1.5
s
11
VCC slew from VTP to 0V
tF
150
s
VCC Fail Detect to RST Active
tRPD
15
s
14
VCC slew from 0V to VTP
tR
150
s
VCC Valid to CE and WE Inactive
tPU
2ms
VCC Valid to End of Write Protection
tREC
125
ms
VCC Valid to RST Inactive
tRPU
150
200
350
ms
14
VCC Valid to BW Valid
tBPU
1s
14
BATTERY WARNING TIMING
(tA: See Note 10)
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
NOTES
Battery Test Cycle
tBTC
24
hr
Battery Test Pulse Width
tBTPW
1s
Battery Test to BW Active
tBW
1s
(tA=25
°C)
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
NOTES
Expected Data Retention Time
tDR
10
years
9
WARNING:
Under no circumstance are negative undershoots, of any amplitude, allowed when device is in battery
backup mode.
NOTES:
1.
WE
is high for a Read Cycle.
2. OE = VIH or VIL. If OE = VIH during write cycle, the output buffers remain in a high-impedance state.
3. tWP is specified as the logical AND of CE and WE . tWP is measured from the latter of CE or WE
going low to the earlier of CE or WE going high.
4. tDS is measured from the earlier of CE or WE going high.
5. These parameters are sampled with a 5 pF load and are not 100% tested.
6. If the CE low transition occurs simultaneously with or latter than the WE low transition, the output
buffers remain in a high-impedance state during this period.
7. If the CE high transition occurs prior to or simultaneously with the WE high transition, the output
buffers remain in high-impedance state during this period.
8. If WE is low or the WE low transition occurs prior to or simultaneously with the CE low transition,
the output buffers remain in a high-impedance state during this period.
相关PDF资料 |
PDF描述 |
|---|---|
| DS1330ABP-70 | 32K X 8 NON-VOLATILE SRAM MODULE, 70 ns, DMA34 |
| DS1330WP-150 | 32K X 8 NON-VOLATILE SRAM MODULE, 150 ns, DMA34 |
| DS1330YP-70 | 32K X 8 NON-VOLATILE SRAM MODULE, 70 ns, DMA34 |
| DS1345ABP-70 | 128K X 8 NON-VOLATILE SRAM MODULE, 70 ns, DMA34 |
| DS1345WP-150 | 128K X 8 NON-VOLATILE SRAM MODULE, 150 ns, DMA34 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| DS1330YP-100+ | 功能描述:NVRAM 256K NV RAM w/Battery Monitor RoHS:否 制造商:Maxim Integrated 数据总线宽度:8 bit 存储容量:1024 Kbit 组织:128 K x 8 接口类型:Parallel 访问时间:70 ns 电源电压-最大:5.5 V 电源电压-最小:4.5 V 工作电流:85 mA 最大工作温度:+ 70 C 最小工作温度:0 C 封装 / 箱体:EDIP 封装:Tube |
| DS1330YP-100-IND | 制造商:DALLAS 制造商全称:Dallas Semiconductor 功能描述:4096k Nonvolatile SRAM with Battery Monitor |
| DS1330YP-70 | 功能描述:NVRAM 256K NV RAM w/Battery Monitor RoHS:否 制造商:Maxim Integrated 数据总线宽度:8 bit 存储容量:1024 Kbit 组织:128 K x 8 接口类型:Parallel 访问时间:70 ns 电源电压-最大:5.5 V 电源电压-最小:4.5 V 工作电流:85 mA 最大工作温度:+ 70 C 最小工作温度:0 C 封装 / 箱体:EDIP 封装:Tube |
| DS1330YP-70+ | 功能描述:NVRAM 256K NV RAM w/Battery Monitor RoHS:否 制造商:Maxim Integrated 数据总线宽度:8 bit 存储容量:1024 Kbit 组织:128 K x 8 接口类型:Parallel 访问时间:70 ns 电源电压-最大:5.5 V 电源电压-最小:4.5 V 工作电流:85 mA 最大工作温度:+ 70 C 最小工作温度:0 C 封装 / 箱体:EDIP 封装:Tube |
| DS1330YP-70IND | 功能描述:NVRAM 256K NV RAM w/Battery Monitor RoHS:否 制造商:Maxim Integrated 数据总线宽度:8 bit 存储容量:1024 Kbit 组织:128 K x 8 接口类型:Parallel 访问时间:70 ns 电源电压-最大:5.5 V 电源电压-最小:4.5 V 工作电流:85 mA 最大工作温度:+ 70 C 最小工作温度:0 C 封装 / 箱体:EDIP 封装:Tube |
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