参数资料
型号: DS1372U+T&R
厂商: Maxim Integrated Products
文件页数: 3/12页
文件大小: 0K
描述: IC BINARY COUNTER 32-BIT 8-USOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 3,000
类型: 二进制计数器
特点: 警报器,方波输出,监视计时器
时间格式: 二进制
数据格式: 二进制
接口: I²C,2 线串口
电源电压: 2.4 V ~ 5.5 V
电压 - 电源,电池: 1.3 V ~ 5.5 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 8-TSSOP,8-MSOP(0.118",3.00mm 宽)
供应商设备封装: 8-uMAX
包装: 带卷 (TR)
2) Slave transmitter mode (DS1372 read mode): The
first byte is received and handled as in the slave
receiver mode. However, in this mode, the direction
bit indicates that the transfer direction is reversed.
The DS1372 transmits serial data on SDA while the
serial clock is input on SCL. START and STOP con-
ditions are recognized as the beginning and end of
a serial transfer (see Figure 7). The slave address
byte is the first byte received after the master gener-
ates the START condition. The slave address byte
contains the 7-bit DS1372 address, which is 110100
and AD0. Each slave address is followed by the
direction bit (R/W), which is one for a read. The bit
position signified by A is compared to the value on
the AD0 pin. After receiving and decoding the slave
address byte, the device outputs an acknowledge
on the SDA line. The DS1372 then begins to transmit
data starting with the register address pointed to by
the register pointer. If the register pointer is not writ-
ten to before the initiation of a read mode, the first
address that is read is the last one stored in the reg-
ister pointer. The DS1372 must receive a "not
acknowledge" to end a read.
DS1372
______________________________________________________________________________________
11
...
A
XXXXXXXX
A
110100
S
AD0
0
XXXXXXXX
A
XXXXXXXX
A
XXXXXXXX
A
P
<SLAVE ADDRESS> <R/W>
<WORD ADDRESS (n)>
<DATA (n)>
<DATA (n + 1)>
<DATA (n + X)
S - START
A - ACKNOWLEDGE (ACK)
P - STOP
R/W - READ/WRITE OR DIRECTION BIT ADDRESS
DATA TRANSFERRED
(X + 1 BYTES + ACKNOWLEDGE)
MASTER TO SLAVE
SLAVE TO MASTER
Figure 6. Data Write—Slave Receiver Mode
...
A
XXXXXXXX
A
110100
S
1
XXXXXXXX
A
XXXXXXXX
A
XXXXXXXX
A
P
<SLAVE ADDRESS> <R/W>
<DATA (n)>
<DATA (n + 1)>
<DATA (n + 2)>
<DATA (n + X)>
S - START
A - ACKNOWLEDGE (ACK)
P - STOP
A - NOT ACKNOWLEDGE (NACK)
R/W - READ/WRITE OR DIRECTION BIT ADDRESS
DATA TRANSFERRED
(X + 1 BYTES + ACKNOWLEDGE)
NOTE: LAST DATA BYTE IS FOLLOWED BY A NACK.
MASTER TO SLAVE
SLAVE TO MASTER
AD0
Figure 7. Data Read (from Current Pointer Location)—Slave Transmitter Mode
S - START
Sr - REPEATED START
A - ACKNOWLEDGE (ACK)
P - STOP
A - NOT ACKNOWLEDGE (NACK)
R/W - READ/WRITE OR DIRECTION BIT ADDRESS
<R/W>
<WORD ADDRESS (n)>
<SLAVE ADDRESS (n)>
<SLAVE ADDRESS>
AD0
A
XXXXXXXX
A
110100A
S
Sr
0
AD0
A
1
DATA TRANSFERRED
(X + 1 BYTES + ACKNOWLEDGE)
NOTE: LAST DATA BYTE IS FOLLOWED BY A NACK.
MASTER TO SLAVE
SLAVE TO MASTER
A
XXXXXXXX
A
XXXXXXXX
A
XXXXXXXX
A
P
<DATA (n)>
<DATA (n + 1)>
<DATA (n + 2)>
<DATA (n + X)>
...
Figure 8. Data Read (Write Pointer, Then Read)—Slave Receive and Transmit
I2C, 32-Bit, Binary Counter Clock with 64-Bit ID
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