参数资料
型号: DS1374U-33+T&R
厂商: Maxim Integrated Products
文件页数: 2/18页
文件大小: 0K
描述: IC RTC I2C W/CHARGER 10-USOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 3,000
类型: 二进制计数器
特点: 警报器,方波输出,涓流充电器,监视计时器
时间格式: 二进制
数据格式: 二进制
接口: I²C,2 线串口
电源电压: 2.97 V ~ 5.5 V
电压 - 电源,电池: 1.3 V ~ 5.5 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 10-TFSOP,10-MSOP(0.118",3.00mm 宽)
供应商设备封装: 10-µMAX
包装: 带卷 (TR)
DS1374
Power Control
The power-control function is provided by a precise,
temperature-compensated voltage reference and a
comparator circuit that monitors the VCC level. The
device is fully accessible and data can be written and
read when VCC is greater than VPF. However, when
VCC falls below VPF, the internal clock registers are
blocked from any access. If VPF is less than VBACKUP,
the device power is switched from VCC to VBACKUP
when VCC drops below VPF. If VPF is greater than
VBACKUP, the device power is switched from VCC to
VBACKUP when VCC drops below VBACKUP. The regis-
ters are maintained from the VBACKUP source until VCC
is returned to nominal levels (Table 1). After VCC
returns above VPF, read and write access is allowed
after RST goes high (Figure 1).
Address Map
Table 3 shows the address map for the DS1374 regis-
ters. During a multibyte access, the address pointer
wraps around to location 00h when it reaches the end of
the register space (08h). On an I2C START, STOP, or
address pointer incrementing to location 00h, the current
time is transferred to a second set of registers. These
secondary registers read the time information, while the
clock continues to run. This eliminates the need to reread
the registers in case of an update of the main registers
during a read.
Time-of-Day Counter
The time-of-day counter is a 32-bit up counter that
increments once per second when the oscillator is run-
ning. The contents can be read or written by accessing
the address range 00h–03h. When the counter is read,
the current time of day is latched into a register, which
is output on the serial data line while the counter contin-
ues to increment.
Note: Writing to any TOD register will reset the 1Hz
square wave output.
I2C, 32-Bit Binary Counter Watchdog RTC with
Trickle Charger and Reset Input/Output
10
____________________________________________________________________
SUPPLY CONDITION
READ/WRITE
ACCESS
POWERED
BY
VCC < VPF, VCC < VBACKPUP
No
VBACKUP
VCC < VPF, VCC > VBACKUP
No
VCC
VCC > VPF, VCC < VBACKUP
Yes
VCC
VCC > VPF, VCC > VBACKUP
Yes
VCC
Table 2. Power Control
ADDRESS
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
FUNCTION
00H
TOD Counter Byte 0
Time-of-Day Counter
01H
TOD Counter Byte 1
Time-of-Day Counter
02H
TOD Counter Byte 2
Time-of-Day Counter
03H
TOD Counter Byte 3
Time-of-Day Counter
04H
WD/ALM Counter Byte 0
Watchdog/Alarm Counter
05H
WD/ALM Counter Byte 1
Watchdog/Alarm Counter
06H
WD/ALM Counter Byte 2
Watchdog/Alarm Counter
07H
EOSC
WACE
WD/ALM
BBSQW
WDSTR
RS2
RS1
AIE
Control
08H
OSF
0
AF
Status
09H
TCS3
TCS2
TCS1
TCS0
DS1
DS0
ROUT1
ROUT0
Trickle Charger
Table 3. Address Map
Note: Unless otherwise specified, the state of the registers is not defined when power is first applied.
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