参数资料
型号: DS1388Z-3+
厂商: Maxim Integrated Products
文件页数: 4/19页
文件大小: 0K
描述: IC RTC I2C W/CHARGER 8-SOIC
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 48
类型: 时钟/日历
特点: EEPROM,闰年,监控器,涓流充电器,监视计时器
存储容量: 512B
时间格式: HH:MM:SS:hh(12/24 小时)
数据格式: YY-MM-DD-dd
接口: I²C,2 线串口
电源电压: 2.7 V ~ 3.3 V
电压 - 电源,电池: 1.3 V ~ 5.5 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOIC
包装: 管件
产品目录页面: 1434 (CN2011-ZH PDF)
I2C RTC/Supervisor with Trickle Charger
and 512 Bytes EEPROM
12
Maxim Integrated
DS1388
Watchdog Alarm Counter
The contents of the watchdog alarm counter, which is a
separate two-byte BCD down counter, are accessed in
the address range 08h–09h in block 0h. It is programma-
ble in 10ms intervals from 0.01 to 99.99 seconds. When
this counter is written, both the counter and a seed regis-
ter are loaded with the desired value. When the counter is
to be reloaded, it uses the value in the seed register.
When the counter is read, the current counter value is
latched into a register, which is output on the serial data
line and the watchdog counter reloads the seed value.
If the counter is not needed, it can be disabled and
used as a 16-bit cache of battery-backed RAM by set-
ting the WDE bit in the control register to logic 0. If all
16 bits of the watchdog alarm counter are written to a
zero when WDE = 1, the counter is disabled and the
WF bit is not set.
When the WDE bit in the control register is set to a logic
1 and a non-zero value is written into the watchdog reg-
isters, the watchdog alarm counter decrements every
1/100 second, until it reaches zero. At this point, the WF
bit in the flag register is set. If WD/RST = 1, the RST pin
is pulsed low for tRST and access to the DS1388 is
inhibited. At the end of tRST, the RST pin becomes high
impedance, and read/write access to the DS1388 is
enabled. The WF flag remains set until cleared by writ-
ing WF to logic 0. The watchdog alarm counter can be
reloaded and restarted before the counter reaches zero
by reading or writing any of the watchdog alarm
counter registers.
The WF flag and WDE bit must be set to zero before writing
the watchdog registers. After writing the watchdog regis-
ters, WDE must be set to one to enable the watchdog.
Power-Up/Down, Reset, and
Pushbutton Reset Functions
A precision temperature-compensated reference and
comparator circuit monitors the status of VCC. When an
out-of-tolerance condition occurs, an internal power-fail
signal is generated that blocks read/write access to the
device and forces the RST pin low. When VCC returns
to an in-tolerance condition, the internal power-fail sig-
nal is held active for tRST to allow the power supply to
stabilize, and the RST pin is held low. If the EOSC bit is
set to a logic 1 (to disable the oscillator in battery-back-
up mode), the internal power-fail signal and the RST pin
are kept active for tRST plus the oscillator startup time.
Access is inhibited whenever RST is low.
The DS1388 provides for a pushbutton switch to be
connected to the RST output pin. When the DS1388 is
not in a reset cycle, it continuously monitors the RST
signal for a low-going edge. If an edge is detected, the
part debounces the switch by pulling the RST pin low
and inhibits read/write access. After the internal timer
has expired, the part continues to monitor the RST line.
If the line is still low, it continues to monitor the line look-
ing for a rising edge. Upon detecting release, the part
forces the RST pin low and holds it low for tRST.
Special-Purpose Registers
The DS1388 has three additional registers (control,
flag, and trickle charger) that control the real-time
clock, watchdog, and trickle charger.
Flag Register (00Bh)
Bit 7: Oscillator Stop Flag (OSF). A logic 1 in this bit
indicates that the oscillator has stopped or was
stopped for some period of time and may be used to
judge the validity of the clock and calendar data. This
bit is edge triggered and is set to logic 1 when the
internal circuitry senses the oscillator has transitioned
from a normal run state to a STOP condition. The follow-
ing are examples of conditions that can cause the OSF
bit to be set:
1) The first time power is applied.
2) The voltage present on both VCC and VBACKUP are
insufficient to support oscillation.
3) The EOSC bit is turned off.
4) External influences on the crystal (i.e., noise, leak-
age, etc.).
This bit remains at logic 1 until written to logic 0. This
bit can only be written to logic 0. Attempting to write
OSF to logic 1 leaves the value unchanged.
Bit 6: Watchdog Alarm Flag (WF). A logic 1 in this bit
indicates that the watchdog counter reached zero. If
WDE and WD/RST are set to 1, the RST pin pulses low
for tRST when the watchdog counter reaches zero and
sets WF = 1. At the completion of the pulse, the WF bit
remains set to logic 1. Writing this bit to logic 0 clears
the WF flag. This bit can only be written to logic 0.
Attempting to write logic 1 leaves the value unchanged.
Bits 5 to 0: These bits read as zero and cannot be
modified.
Flag Register (00Bh)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
OSF
WF
0
00000
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DS1388Z-3+T&R 制造商:Maxim Integrated Products 功能描述:2WIRE RTC 3V,SUPRVSR &EPROM PB-F TR - Tape and Reel 制造商:Maxim Integrated Products 功能描述:IC RTC I2C W/CHARGER 8-SOIC
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DS1388Z-33 功能描述:实时时钟 RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 总线接口:I2C 日期格式:DW:DM:M:Y 时间格式:HH:MM:SS RTC 存储容量:64 B 电源电压-最大:5.5 V 电源电压-最小:1.8 V 最大工作温度:+ 85 C 最小工作温度: 安装风格:Through Hole 封装 / 箱体:PDIP-8 封装:Tube
DS1388Z-33+ 功能描述:实时时钟 I2C RTC/Supervisor w/Trickle Charger RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 总线接口:I2C 日期格式:DW:DM:M:Y 时间格式:HH:MM:SS RTC 存储容量:64 B 电源电压-最大:5.5 V 电源电压-最小:1.8 V 最大工作温度:+ 85 C 最小工作温度: 安装风格:Through Hole 封装 / 箱体:PDIP-8 封装:Tube