参数资料
型号: DS1388Z-3
厂商: MAXIM INTEGRATED PRODUCTS INC
元件分类: XO, clock
英文描述: The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each
中文描述: REAL TIME CLOCK, PDSO8
封装: 0.150 INCH, SOIC-8
文件页数: 15/18页
文件大小: 381K
代理商: DS1388Z-3
Each data transfer is initiated with a START condition
and terminated with a STOP condition. The number
of data bytes transferred between the START and the
STOP conditions is not limited, and is determined by
the master device. The information is transferred
byte-wise and each receiver acknowledges with a
ninth bit.
Acknowledge:
Each receiving device, when
addressed, is obliged to generate an acknowledge
(ACK) after the reception of each byte. The master
device must generate an extra clock pulse, which is
associated with this acknowledge bit. The DS1388
does not generate any acknowledge bits if access to
the EEPROM is attempted during an internal pro-
gramming cycle.
A device that acknowledges must pull down the SDA
line during the acknowledge clock pulse in such a
way that the SDA line is stable low during the high
period of the acknowledge-related clock pulse. Of
course, setup and hold times must be taken into
account. A master must signal an end of data to the
slave by generating a not-acknowledge (NACK) bit on
the last byte that has been clocked out of the slave. In
this case, the slave must leave the data line high to
enable the master to generate the STOP condition.
Figures 8 and 9 detail how data transfer is accom-
plished on the I
2
C bus. Depending upon the state of
the R/
W
bit, two types of data transfer are possible:
Data transfer from a master transmitter to a slave
receiver.
The first byte transmitted by the master is
the slave address. Next follows a number of data
bytes. The slave returns an acknowledge bit after
each received byte. Data are transferred with the
most significant bit (MSB) first.
Data transfer from a slave transmitter to a master
receiver.
The first byte (the slave address) is trans-
mitted by the master. The slave then returns an
acknowledge bit. Next follows a number of data
bytes transmitted by the slave to the master. The
master returns an acknowledge bit after all received
bytes other than the last byte. At the end of the last
received byte, a NACK is returned.
The master device generates all the serial clock
pulses and the START and STOP conditions. A trans-
fer is ended with a STOP condition or with a repeat-
ed START condition. Since a repeated START
condition is also the beginning of the next serial
transfer, the bus is not released. Data are transferred
with the most significant bit (MSB) first.
D
I
2
C RTC/Supervisor with Trickle Charger
and 512 Bytes EEPROM
____________________________________________________________________
15
STOP
CONDITION
OR REPEATED
START
CONDITION
REPEATED IF MORE BYTES
ARE TRANSFERED
ACK
START
CONDITION
ACK
ACKNOWLEDGEMENT
SIGNAL FROM RECEIVER
ACKNOWLEDGEMENT
SIGNAL FROM RECEIVER
SLAVE ADDRESS
MSB
SCL
SDA
R/W
DIRECTION
BIT
1
2
6
7
8
9
1
2
8
9
3–7
Figure 7. I
2
C Data Transfer Overview
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DS1388Z-3+T&R 制造商:Maxim Integrated Products 功能描述:2WIRE RTC 3V,SUPRVSR &EPROM PB-F TR - Tape and Reel 制造商:Maxim Integrated Products 功能描述:IC RTC I2C W/CHARGER 8-SOIC
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DS1388Z-33 功能描述:实时时钟 RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 总线接口:I2C 日期格式:DW:DM:M:Y 时间格式:HH:MM:SS RTC 存储容量:64 B 电源电压-最大:5.5 V 电源电压-最小:1.8 V 最大工作温度:+ 85 C 最小工作温度: 安装风格:Through Hole 封装 / 箱体:PDIP-8 封装:Tube
DS1388Z-33+ 功能描述:实时时钟 I2C RTC/Supervisor w/Trickle Charger RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 总线接口:I2C 日期格式:DW:DM:M:Y 时间格式:HH:MM:SS RTC 存储容量:64 B 电源电压-最大:5.5 V 电源电压-最小:1.8 V 最大工作温度:+ 85 C 最小工作温度: 安装风格:Through Hole 封装 / 箱体:PDIP-8 封装:Tube