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| 型号： | DS1500YN |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 20/20页 |
| 文件大小： | 0K |
| 描述： | IC RTC Y2KC W/NV CTRL 5V 32-DIP |
| 标准包装： | 13 |
| 类型： | 时钟/日历 |
| 特点： | 警报器，闰年，NVSRAM，方波输出，监视计时器，Y2K |
| 存储容量： | 256B |
| 时间格式： | HH:MM:SS（24 小时） |
| 数据格式： | YY-MM-DD-dd |
| 接口： | 并联 |
| 电源电压： | 4.5 V ~ 5.5 V |
| 电压 - 电源，电池： | 2.5 V ~ 3.7 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 通孔 |
| 封装/外壳： | 32-DIP 模块（0.600"，15.24mm） |
| 供应商设备封装： | 32-EDIP |
| 包装： | 管件 |
DS1500 Y2KC Watchdog RTC with Nonvolatile Control
9 of 20
PIN DESCRIPTION
PIN
NAME
FUNCTION
1
SQW
Square-Wave Output. When enabled, the SQW pin outputs a 32.768kHz square wave. If the square
wave (E32K) and battery-backup 32kHz (BB32) bits are enabled, power is provided by VBAUX when
VCC is absent.
2
KS
Kickstart Input. This pin is used to wake up a system from an external event, such as a key closure.
The KS pin is normally connected using a pullup resistor to VBAUX. If the KS function is not used,
connect to ground.
3
VBAT
Battery input for any standard 3V lithium cell or other energy source. Battery voltage must be held
between 2.5V and 3.7V for proper operation. UL recognized to ensure against reverse charging
current when used with a lithium battery. If not used, connect to ground.*
4
VBAUX
Auxiliary battery input for any standard 3V lithium cell or other energy source. Battery voltage must
be held between 2.5V and 3.7V for proper operation. Provides backup power to the device, and
provides power for auxiliary functions. UL recognized to ensure against reverse charging current
when used with a lithium battery. If not used, connect to ground.*
5
CEO
Chip-Enable Output. Buffered chip-enable output signal for external SRAM switches high when VCCI
falls below the power-fail point VPF.
6
CEI
Chip-Enable Input. Input for chip-enable signal for external SRAM.
7
WE
Write-Enable Input. Active-low input that enables DQ0–DQ7 for data input to the device.
8
VCC1
DC power is applied to the device on these pins. VCC is the positive terminal. When power is applied
within the normal limits, the device is fully accessible and data can be written and read. When VCC
drops below the normal limits, reads and writes are inhibited. As VCC drops below the battery
voltage, the RAM and timekeeping circuits are switched over to the battery.
9
VCC0
Buffered VCC output to external SRAM. Switches to either VBAT or VBAUX when in data retention
mode.
10
N.C.
No Connection
11
PWR
Power-On Output (Open Drain). This output, if used, is normally connected to power-supply control
circuitry. This pin requires a pullup resistor connected to a positive supply to operate correctly.
12, 13
X1, X2
Connections for a standard 32.768kHz quartz crystal. For greatest accuracy, the DS1500 must be
used with a crystal that has a specified load capacitance of either 6pF or 12.5pF. The crystal select
(CS) bit in control register B is used to select operation with a 6pF or 12.5pF crystal. The crystal is
attached directly to the X1 and X2 pins. There is no need for external capacitors or resistors. An
external 32.768kHz oscillator can also drive the DS1500. In this configuration, the X1 pin is
connected to the external oscillator signal and the X2 pin is left unconnected. For more information
about crystal selection and crystal layout considerations, refer to Application Note 58: Crystal
Considerations with Maxim Real-Time Clocks (RTCs). See Figure 8.
14
RST
Reset Output (Open Drain). This output, if used, is normally connected to a microprocessor-reset
input. This pin requires a pullup resistor connected to a positive supply to operate correctly. When
RST is active, the device is not accessible.
15
IRQ
Interrupt Output (Open Drain). This output, if used, is normally connected to a microprocessor
interrupt input. This pin requires a pullup resistor connected to a positive supply to operate correctly.
16–20
A4–A0
Address Inputs. Selects one of 17 register locations.
21–23,
25–29
DQ0–DQ7 Data I/O pins for 8-bit parallel data transfer.
24, 31
GND
DC power is applied to the device on these pins. VCC is the positive terminal. When power is applied
within the normal limits, the device is fully accessible and data can be written and read. When VCC
drops below the normal limits, reads and writes are inhibited. As VCC drops below the battery
voltage, the RAM and timekeeping circuits are switched over to the battery.
30
CS
Chip-Select Input. Active-low input to enable the device.
32
OE
Output-Enable Input. Active-low input that enables DQ0–DQ7 for data output from the device
*See “Conditions of Acceptability” at www.maxim-ic.com/TechSupport/QA/ntrl.htm.
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