参数资料
型号: DS1609-50+
厂商: Maxim Integrated
文件页数: 7/7页
文件大小: 0K
描述: IC SRAM 2KBIT 50NS 24DIP
标准包装: 16
格式 - 存储器: RAM
存储器类型: SRAM - 双端口,异步
存储容量: 2K (256 x 8)
速度: 50ns
接口: 并联
电源电压: 4.5 V ~ 5.5 V
工作温度: -40°C ~ 85°C
封装/外壳: 24-DIP(0.600",15.24mm)
供应商设备封装: 24-PDIP
包装: 管件
DS1609
NOTES:
1. All Voltages are referenced to ground.
2. All pins other than CE, WE, OE, V CC and ground are continuously driven by a feedback latch in order to hold the
inputs at one power supply rail or the other when an input is tristated. The minimum driving impedance presented
to any pin is 50K ? . If a pin is at a logic low level, this impedance will be pulling the pin to ground. If a pin is at a
logic high level, this impedance will be pulling the pin to V CC .
3. Standby current is measured with outputs open circuited.
4. I CCS1 is measured with all pins within 0.3V of V CC or GND and with CE at a logic high or logic low level.
5. I CCS2 is measured with all pins within 0.3V of V CC or ground and with CE within 0.3V of V CC .
6. I CCS3 is measured with all pins at V CC or ground potential and with CE = V CC . Note that if a pin is floating, the
internal feedback latches will pull all the pins to one power supply rail or the other.
7. Active current is measured with outputs open circuited, and inputs swinging full supply levels with one port reading
and one port writing at 100 ns cycle time. Active currents are a DC average with respect to the number of 0’s and
1’s being read or written.
8. Logic one voltages are specified at a source current of 1 mA.
9. Logic zero voltages are specified at a sink current of 4 mA.
10. Measured with a load as shown in Figure 3 .
11. t WP is defined as the time from WE going low to the first of the rising edges of WE and CE.
12. Recovery time is the amount of time control signals must remain high between successive cycles.
13. Typical values are at 25 ° C.
LOAD SCHEMATIC Figure 3
+5 VOLTS
1.1K ?
D.U.T.
680 ?
30 pF
020499 7/7
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