参数资料
型号: DS1830S+T&R
厂商: Maxim Integrated Products
文件页数: 3/7页
文件大小: 0K
描述: IC SEQUENCER RESET PB 5V 8-SOIC
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
类型: 序列发生器
监视电压数目: 1
输出: 开路漏极或开路集电极
复位: 低有效
复位超时: 可调节/可选择
电压 - 阀值: 5V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOIC
包装: 带卷 (TR)
D1830/A
OPERATION — PUSHBUTTON RESET
The DS1830 provides a pushbutton switch for manual reset control. When any of the DS1830/A resets
are not active (low) a reset cycle can be initiated by a pushbutton reset. The pushbutton reset is generated
by pulling the PBRST pin low for at least 1ms. When the push- button is held low all resets are forced
active. The reset will remain active until the pushbutton input is released and then will start a sequenced
time-out based on the condition of the TD input. The Pushbutton input is pulled high through an internal
40k W pull-up resistor and debounced via internal circuitry. See Figure 2 for an application example and
Figure 3 for the timing diagram.
PUSHBUTTON RESET Figure 2
TIMING DIAGRAM — PUSHBUTTON RESET Figure 3
OPERATION — TIME DELAY SELECT
The DS1830 provides an input to select three time delay characteristics for the reset outputs. The TD
input has 3 states high (V CC ), low (ground) and no connect (N.C.). Table 2 details the minimum timing
based on the state of the TD input. If the TD input is connected to ground; RST1 will have a minimum
time delay of 10 ms after V CC is in tolerance. If the TD input is floated; RST1 will have a minimum time
delay of 20 ms after V CC is in tolerance. If the TD input is connected to V CC , RST1 will have a minimum
time delay of 50 ms after V CC is in tolerance. An oscillator and clock chain generate the reset timing with
e ach time d elay based on the same device oscillator. The time delay for RST2 will be 5 times as long as
RST1 and RST3 will be 10 times the duration of RST1 .
TD CONTROL MINIMUM RESET TIMING Table 2
TD
TD = GND
TD = N.C.
TD = V CC
T RST1
10ms
20ms
50ms
T RST2
50ms
100ms
250ms
T RST3
100ms
200ms
500ms
3 of 7
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