参数资料
型号: DS1881Z-050+T&R
厂商: Maxim Integrated Products
文件页数: 4/16页
文件大小: 0K
描述: IC DGTL POT NV 2CH 45K 16-SOIC
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 1,000
接片: 64
电阻(欧姆): 45k
电路数: 2
温度系数: 标准值 750 ppm/°C
存储器类型: 非易失
接口: I²C(设备位址)
电源电压: 2.7 V ~ 5.5 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 16-SOIC(0.154",3.90mm 宽)
供应商设备封装: 16-SOIC
包装: 带卷 (TR)
DS1881
Dual NV Audio Taper Digital Potentiometer
12
____________________________________________________________________
I2C Interface for the DS1881
The CE pin serves as a communication enable pin.
When active (CE = 0), the inputs SDA and SCL are rec-
ognized by the device. If inactive (CE = 1), pins SDA
and SCL are disabled, making I2C communication
impossible.
Three pins, A0, A1, A2, serve as slave address inputs.
For multidrop configurations, they allow eight such
devices to be addressed by the same I2C bus. If the
I2C address matches the hardware levels of these bits,
the DS1881 is allowed to receive communications from
the I2C bus.
The I2C slave address byte is shown below. This is the
first byte transmitted from the master to the DS1881.
The upper nibble value is fixed to 0101. Bit values A2,
A1, and A0 are determined by the states of the corre-
sponding pins. The LSB, R/W, determines whether a
read or write will be performed.
The next byte to be transmitted is the Command Byte
(see the Command Byte section for details).
READ PROTOCOL
0
MSB
LSB
POT-0
1
0
MSB
LSB
POT-1
A
0
A
1
A
2
1
10 1
0
MSB
LSB
R/W = 1
DATA BYTES ARE READ IN THE ORDER SHOWN ABOVE.
COMMAND
BYTE
COMMAND
BYTE
COMMAND
BYTE
SLAVE ADDRESS
BYTE
MSB
LSB
CONFIG
REG
10
ST
AR
T
ACK
STOP
Figure 1. Read Protocol
SLAVE ADDRESS BYTE
0
1
0
1
A2A1A0
R/W
MSB
LSB
Reading Pot Values
As shown in Figure 1, the DS1881 provides one read
command operation. This operation allows the user to
read both Potentiometer Wiper Setting Registers and
the Configuration Register. To initiate a read operation,
the R/W bit of the slave address byte is set to 1.
Communication to read the DS1881 begins with a
START condition, which is issued by the master device.
The slave address byte sent from the master device fol-
lows the START condition. Once a matching slave
address byte has been received by the DS1881, the
DS1881 responds with an acknowledge. The master
can then begin to receive data. The value of the wiper
of Potentiometer 0 is the first returned from the DS1881.
It is then followed by the value of Potentiometer 1 and
then the value of the Configuration Register. Once the 8
bits of the Configuration Register have been sent, the
master needs to issue an acknowledge, unless it is the
last byte to be read, in which case the master issues a
not acknowledge. If desired, the master may stop the
communication transfer at this point by issuing the
STOP condition after the not acknowledge. However, if
the value of the three registers is needed again, the
transfer can continue by clocking the 8 bits of the
Potentiometer 0 value as described above.
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