参数资料
型号: DS1921Z-F5#
厂商: Maxim Integrated
文件页数: 41/45页
文件大小: 0K
描述: IBUTTON THERMOCHRON F5
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
RoHS指令信息: IButton RoHS Compliance Plan
标准包装: 8
系列: iButton®
存储容量: 512B
存储器类型: NVSRAM(非易失 SRAM)
产品目录页面: 1431 (CN2011-ZH PDF)
DS1921H/Z
N CONV
PARAMETER SYMBOL
Presence Detect High t PDH
Time
Presence Detect Low t PDL
Time
Presence Detect t MSP
Sample Time
IO pin, 1-Wire Write
Write-0 Low Time t W0L
Write-1 Low Time t W1L
IO pin, 1-Wire Read
Read Low Time t RL
Read Sample Time t MSR
Real-Time Clock
Frequency Deviation ? F
Temperature Converter
Tempcore Operating T TC
Range
Conversion Time t CONV
Thermal Response τ RESP
Time Constant
Conversion Error ??
Number of
Conversions
CONDITIONS
Standard Speed
Overdrive Speed
Standard Speed
Overdrive Speed
Standard Speed
Overdrive Speed
Standard Speed
Overdrive Speed
Standard Speed
Overdrive Speed
Standard Speed
Overdrive Speed
Standard Speed
Overdrive Speed
-5°C to +46°C
DS1921H
DS1921Z
MIN TYP MAX UNITS NOTES
15 60 μs 15
1.1 6
60 270 μs 15
7.5 24
60 75 μs 1, 16
6 8.6
60 120 μs 1, 11, 15
6 15
5 15 μs 1, 11
1 2
5 15 - δ μs 1, 12
1 2 - δ
t RL + δ 15 μs 1, 12
t RL + δ 2
-48 +46 PPM
15 46 °C
-5 +26
75 360 ms
130 s 13
-1 +1 °C 17, 18
(see lifetime graphs) — 14, 16
NOTES
1) System Requirement.
2) Maximum allowable pull-up resistance is a function of the number of 1-Wire devices in the
system and 1-Wire recovery times. The specified value here applies to systems with only one
device and with the minimum 1-Wire recovery times. For more heavily loaded systems, an active
pull-up such as that found in the DS2480B may be required.
3) Capacitance on IO could be 800pF when power is first applied. If a 2.2k ? resistor is used to pull
up the data line, 2.5μs after V PUP has been applied the parasite capacitor will not affect normal
communication.
4) Input load is to ground.
5) All voltages are referenced to ground.
6) V TL and V TH are functions of the internal supply voltage, which is a function of V PUP and the
1-Wire recovery times. The V TH and V TL maximum specifications are valid at V PUP = 5.25V. In
any case, V TL < V TH < V PUP .
7) Voltage below which, during a falling edge on IO, a logic 0 is detected.
8) The voltage on IO needs to be less or equal to V ILMAX whenever the master drives the line low.
9) Voltage above which, during a rising edge on IO, a logic 1 is detected.
10) The I-V characteristic is linear for voltages less than 1V.
41 of 45
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