- 您现在的位置：买卖IC网 > PDF目录10986 > DS21372T (Maxim Integrated Products)IC TESTER BIT ERROR 3.3V 32-TQFP PDF资料下载
参数资料
| 型号： | DS21372T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 18/22页 |
| 文件大小： | 0K |
| 描述： | IC TESTER BIT ERROR 3.3V 32-TQFP |
| 产品培训模块： | Lead (SnPb) Finish for COTS |
| 产品变化通告： | Product Discontinuation 20/Feb/2012 |
| 标准包装： | 250 |
| 功能： | 位误码率测试器（BERT） |
| 接口： | T1 |
| 电路数： | 1 |
| 电源电压： | 3 V ~ 3.6 V |
| 电流 - 电源： | 10mA |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-TQFP |
| 供应商设备封装： | 32-TQFP（7x7） |
| 包装： | 托盘 |
| 包括： | 错误计数器，样式发生器和检测器 |
DS21372
5 of 22
PIN
SYMBOL
TYPE
DESCRIPTION
24
RL
I
Receive Load. A positive-going edge loads the previous 32 bits of data
received at RDATA into the Pattern Receive Registers. RL is logically
OR’ed with control bit PCR.3. Should be tied to VSS if not used.
25
RDATA
I
Receive Data. Received NRZ serial data, sampled on the rising edge of
RCLK.
26
RDIS
I
Receive Disable. Set high to prevent the data at RDATA from being
sampled. Set low to allow bits at RDATA to be sampled. Should be tied
to VSS if not used. See Figure 6 for timing information. All receive side
operations are disabled when RDIS is high.
27
RCLK
I
Receive Clock. Input clock from transmission link. 0 to 20 MHz. Can
be a gapped clock. Fully independent from TCLK.
28
VDD
-
Positive Supply. 3.3V.
29
VSS
-
Signal Ground. 0.0V. Should be tied to local ground plane.
30
TCLK
I
Transmit Clock.
Transmit demand clock. 0 to 20 MHz. Can be a
gapped clock. Fully independent of RCLK.
31
TDIS
I
Transmit Disable. Set high to hold the current bit being transmitted at
TDATA. Set low to allow the next bit to appear at TDATA. Should be
tied to VSS if not used. See Figure 7 for timing information. All transmit
side operations are disabled when TDIS is high.
32
TDATA
O
Transmit Data. Transmit NRZ serial data, updated on the rising edge of
TCLK.
DS21372 REGISTER MAP Table 2
ADDRESS
R/W
REGISTER NAME
ADDRESS
R/W
REGISTER NAME
00
R/W
Pattern Set Register 3.
0C
R
Bit Error Counter Register 3.
01
R/W
Pattern Set Register 2.
0D
R
Bit Error Counter Register 2.
02
R/W
Pattern Set Register 1.
0E
R
Bit Error Counter Register 1.
03
R/W
Pattern Set Register 0.
0F
R
Bit Error Counter Register 0.
04
R/W
Pattern Length Register.
10
R
Pattern Receive Register 3.
05
R/W
Polynomial Tap Register.
11
R
Pattern Receive Register 2.
06
R/W
Pattern Control Register.
12
R
Pattern Receive Register 1.
07
R/W
Error Insert Register.
13
R
Pattern Receive Register 0.
08
R
Bit Counter Register 3.
14
R
Status Register.
09
R
Bit Counter Register 2.
15
R/W
Interrupt Mask Register.
0A
R
Bit Counter Register 1.
1C
R/W
Test Register (see note 1)
0B
R
Bit Counter Register 0.
NOTE:
1. The Test Register must be set to 00 hex to insure proper operation of the DS21372.
相关PDF资料 |
PDF描述 |
|---|---|
| MC9S12P96MFT | MCU 16BIT 96K FLASH 48-QFN |
| DS2180AQ | IC TRANSCEIVER T1 44-PLCC |
| VI-B5N-IY-F1 | CONVERTER MOD DC/DC 18.5V 50W |
| VI-B5L-IY-F3 | CONVERTER MOD DC/DC 28V 50W |
| MC9S08AC32CFGE | IC MCU 8BIT 32K FLASH 44-LQFP |
相关代理商/技术参数 |
参数描述 |
|---|---|
| DS21372T+ | 功能描述:网络控制器与处理器 IC 3.3V Bit Error Rate Tester (BERT) RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
| DS21372TN | 功能描述:网络控制器与处理器 IC 3.3V Bit Error Rate Tester (BERT) RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
| DS21372TN+ | 功能描述:网络控制器与处理器 IC 3.3V Bit Error Rate Tester (BERT) RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
| DS214 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Analog IC |
| DS2141A | 功能描述:网络控制器与处理器 IC T1 Controller w/Elastic Store RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
发布紧急采购，3分钟左右您将得到回复。