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参数资料
| 型号： | DS2143QN/T&R |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 43/44页 |
| 文件大小： | 0K |
| 描述： | IC CONTROLLER E1 5V LP 44-PLCC |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 500 |
| 控制器类型： | E1 控制器 |
| 接口： | 并行/串行 |
| 电源电压： | 4.5 V ~ 5.5 V |
| 电流 - 电源： | 10mA |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 44-LCC（J 形引线） |
| 供应商设备封装： | 44-PLCC（16.59x16.59） |
| 包装： | 带卷 (TR) |
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DS2143/DS2143Q
8 of 44
ADDRESS
A7 to A0
HEX
R/W
REGISTER
NAME
01001101
4D
R/W
Transmit
Signaling
Register 14.
01001110
4E
R/W
Transmit
Signaling
Register 15.
01001111
4F
R/W
Transmit
Signaling
Register 16.
Note: All values indicated within the Address
column are hexadecimal.
2.0 PARALLEL PORT
The DS2143 is controlled via a multiplexed bidirectional address/data bus by an external microcontroller
or microprocessor. The DS2143 can operate with either Intel or Motorola bus timing configurations. If
the BTS pin is tied low, Intel timing will be selected; if tied high, Motorola timing will be selected. All
Motorola bus signals are listed in parentheses (). See the timing diagrams in the AC Electrical
Characteristics for more details. The multiplexed bus on the DS2143 saves pins because the address
information and data information share the same signal paths. The addresses are presented to the pins in
the first portion of the bus cycle and data will be transferred on the pins during second portion of the bus
cycle. Addresses must be valid prior to the falling edge of ALE(AS), at which time the DS2143 latches
the address from the AD0 to AD7 pins. Valid write data must be present and held stable during the later
portion of the DS or WR pulses. In a read cycle, the DS2143 outputs a byte of data during the latter
portion of the DS or RD pulses. The read cycle is terminated and the bus returns to a high impedance
state as RD transitions high in Intel timing or as DS transitions low in Motorola timing.
3.0 CONTROL AND TEST REGISTERS
The operation of the DS2143 is configured via a set of five registers. Typically, the control registers are
only accessed when the system is first powered up. Once the DS2143 has been initialized, the control
registers will only need to be accessed when there is a change in the system configuration. There are two
Receive Control Registers (RCR1 and RCR2), two Transmit Control Registers (TCR1 and TCR2), and a
Common Control Register (CCR). Each of the five registers is described in this section.
The Test Register at address 15 hex is used by the factory in testing the DS2143. On power-up, the Test
Register should be set to 00 hex in order for the DS2143 to operate properly.
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