- 您现在的位置：买卖IC网 > PDF目录97866 > DS2151QB (MAXIM INTEGRATED PRODUCTS INC) DATACOM, FRAMER, PQCC44 PDF资料下载
参数资料
| 型号： | DS2151QB |
| 厂商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分类： | Digital Transmission Controller |
| 英文描述： | DATACOM, FRAMER, PQCC44 |
| 封装： | 0.652 INCH, PLASTIC, LCC-44 |
| 文件页数： | 10/62页 |
| 文件大小： | 921K |
| 代理商： | DS2151QB |
第1页第2页第3页第4页第5页第6页第7页第8页第9页当前第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页
DS2151Q
18 of 60
4.5
Loop Code Generation
When either the CCR3.1 or CCR3.2 bits are set to 1, the DS2151Q will replace the normal transmitted
payload with either the Loop Up or Loop Down code, respectively. The DS2151Q will overwrite the
repeating loop code pattern with the framing bits. The SCT will continue to transmit the loop codes as
long as either bit is set. It is an illegal state to have both CCR3.1 and CCR3.2 set to 1 at the same time.
4.6
Pulse Density Enforcer
The SCT always examines both the transmit and receive data streams for violations of the following rules
which are required by ANSI T1.403-199X:
– no more than 15 consecutive 0s
– at least N 1s in each and every time window of 8 x (N +1) bits where N = 1 through 23
Violations for the transmit and receive data streams are reported in the RIR2.0 and RIR2.1 bits
respectively.
When the CCR3.3 is set to 1, the DS2151Q will force the transmitted stream to meet this requirement no
matter the content of the transmitted stream. When running B8ZS, the CCR3.3 bit should be set to 0,
since B8ZS encoded data streams cannot violate the pulse density requirements.
4.7
Power-Up Sequence
On power-up, after the supplies are stable, the DS2151Q should be configured for operation by writing to
all of the internal registers (this includes setting the Test Register to 00Hex) since the contents of the
internal registers cannot be predicted on power-up. Next, the LIRST bit should be toggled from 0 to 1 to
reset the line interface (it will take the DS2151Q about 40ms to recover from the LIRST being toggled).
Finally, after the SYSCLK input is stable, the ESR bit should be toggled from a 0 to a 1 (this step can be
skipped if the elastic stores are disabled).
相关PDF资料 |
PDF描述 |
|---|---|
| DS2152LN | DATACOM, FRAMER, PQFP100 |
| DS2152L | DATACOM, FRAMER, PQFP100 |
| DS2153Q | DATACOM, FRAMER, PQCC44 |
| DS2154L | DATACOM, FRAMER, PQFP100 |
| DS21554L | DATACOM, PCM TRANSCEIVER, PQFP100 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| DS2151QB/T&R | 制造商:Maxim Integrated Products 功能描述:T1 SINGLE CHIP XCVR REV B T&R - Tape and Reel |
| DS2151QB/T&R+ | 制造商:Maxim Integrated Products 功能描述:FRAMER DS1/E1/ISDN-PRI/T1 5V 44PLCC - Tape and Reel |
| DS2151QB/T&R | 功能描述:网络控制器与处理器 IC RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
| DS2151QB+ | 功能描述:网络控制器与处理器 IC T1 Transceiver RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
| DS2151QB+T&R | 制造商:Maxim Integrated Products 功能描述:FRAMER DS1/E1/ISDN-PRI/T1 5V 44PLCC - Tape and Reel |
发布紧急采购，3分钟左右您将得到回复。