参数资料
型号: DS21FT42N
厂商: DALLAS SEMICONDUCTOR
元件分类: Digital Transmission Controller
英文描述: DATACOM, FRAMER, PBGA300
封装: 27 X 27 MM, BGA-300
文件页数: 77/115页
文件大小: 534K
代理商: DS21FT42N
DS21FF42/DS21FT42
64 of 115
tied to the TSSYNC input. On power–up after the RSYSCLK and TSYSCLK signals have locked to the
RCLK signal, the elastic stores should be reset.
18.
HDLC CONTROLLER
The DS21Q42 has an enhanced HDLC controller configurable for use with the Facilities Data Link or
DS0s. There are 64-byte buffers in both the transmit and receive paths. The user can select any DS0 or
multiple DS0s as well as any specific bits within the DS0(s) to pass through the HDLC controller. See
Figure 24-15 for details on formatting the transmit side. Note that TBOC.6 = 1 and TDC1.7 = 1 cannot
exist without corrupting the data in the FDL. For use with the FDL, see section 19.1. See Table 18-1 for
configuring the transmit HDLC controller.
Four new registers were added for the enhanced functionality of the HDLC controller; RDC1, RDC2,
TDC1, and TDC2. Note that the BOC controller is functional when the HDLC controller is used for
DS0s. Section 19 contains all of the HDLC and BOC registers and information on FDL/Fs Extraction
and Insertion with and without the HDLC controller.
TRANSMIT HDLC CONFIGURATION Table 18-1
Function
TBOC.6
TDC1.7
TCR1.2
DS0(s)
0
1
1 or 0
FDL
101
Disable
0
1 or 0
18.1 HDLC FOR DS0S
When using the HDLC controllers for DS0s, the same registers shown in section 19 will be used except
for the TBOC and RBOC registers and bits HCR.7, HSR.7, and HIMR.7. As a basic guideline for
interpreting and sending HDLC messages and BOC messages, the following sequences can be applied.
RECEIVE A HDLC MESSAGE
1. Enable RPS interrupts
2. Wait for interrupt to occur
3. Disable RPS interrupt and enable either RPE, RNE, or RHALF interrupt
4. Read RHIR to obtain REMPTY status
A. If REMPTY=0, then record OBYTE, CBYTE, and POK bits and then read the FIFO
A1. If CBYTE=0 then skip to step 5
A2. If CBYTE=1 then skip to step 7
B. If REMPTY=1, then skip to step 6
5. Repeat step 4
6. Wait for interrupt, skip to step 4
7. If POK=0, then discard whole packet, if POK=1, accept the packet
8. Disable RPE, RNE, or RHALF interrupt, enable RPS interrupt and return to step 1
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