参数资料
型号: DS2408S+T&R
厂商: Maxim Integrated Products
文件页数: 10/39页
文件大小: 0K
描述: IC SWITCH 8-CHAN ADDRESS 16SOIC
标准包装: 2,500
接口: 1 线
输入/输出数: 8
中断输出: *
电源电压: 2.8 V ~ 5.25 V
工作温度: *
安装类型: 表面贴装
封装/外壳: 16-SOIC(0.154",3.90mm 宽)
供应商设备封装: 16-SOIC
包装: 带卷 (TR)
包括: *
DS2408
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the data pattern AAh. If the RSTZ pin is configured as STRB, a strobe signal will be generated during the
transmission of the first two (least significant) bits of the confirmation byte. The strobe can signal a FIFO
or a microcontroller to read the new data byte from the PIO. While the last bit of the confirmation byte is
transmitted, the DS2408 samples the status of the PIO pins, as shown in Figure 9, and sends it to the
master. Depending on the data, the master can either continue writing more data to the PIO or issue a 1-
Wire reset to end the command.
Write Conditional Search Register [CCh]
This command is used to tell the DS2408 the conditions that need to be met for the device to respond to a
Conditional Search command, to define the function of the RSTZ pin and to clear the power-on reset flag.
After issuing the command the master sends the 2-byte target address, which must be a value between
008Bh and 008Dh. Next the master sends the byte to be written to the addressed cell. If the address was
valid, the byte is immediately written to its location in the register page. The master now can either end
the command by issuing a 1-Wire reset or send another byte for the next higher address. Once register
address 008Dh has been written, any subsequent data bytes will be ignored. The master has to send a 1-
Wire reset to end the command. Since the Write Conditional Search Register flow does not include any
error-checking for the new register data, it is important to verify correct writing by reading the registers
using the Read PIO Registers command.
Reset Activity Latches [C3h]
Each PIO channel includes an activity latch that is set whenever there is a state transition at a PIO pin.
This change may be caused by an external event/signal or by writing to the PIO. Depending on the
application there may be a need to reset the activity latch after having captured and serviced an external
event. Since there is only read access to the PIO Activity Latch State Register, the DS2408 supports a
special command to reset the latches. After having received the command code, the device resets all
activity latches simultaneously. There are two ways for the master to verify the execution of the Reset
Activity Latches command. The easiest way is to start reading from the 1-Wire line right after the
command code is transmitted. In this case the master will read AAh bytes until it sends a 1-Wire reset.
The other way to verify execution is to read register address 008Ah.
1-WIRE BUS SYSTEM
The 1-Wire bus is a system that has a single bus master and one or more slaves. In all instances the
DS2408 is a slave device. The bus master is typically a microcontroller or PC. For small configurations
the 1-Wire communication signals can be generated under software control using a single port pin. For
multisensor networks, the DS2480B 1-Wire line driver chip or serial port adapters based on this chip
(DS9097U series) are recommended. This simplifies the hardware design and frees the microprocessor
from responding in real time.
The discussion of this bus system is broken down into three topics: hardware configuration, transaction
sequence, and 1-Wire signaling (signal types and timing). The 1-Wire protocol defines bus transactions in
terms of the bus state during specific time slots that are initiated on the falling edge of sync pulses from
the bus master.
HARDWARE CONFIGURATION
The 1-Wire bus has only a single line by definition; it is important that each device on the bus be able to
drive it at the appropriate time. To facilitate this, each device attached to the 1-Wire bus must have open
drain or tri-state outputs. The 1-Wire port of the DS2408 is open-drain with an internal circuit equivalent
to that shown in Figure 11.
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