参数资料
型号: DS2411P
英文描述: Silicon Serial Number with VCC Input
中文描述: 硅序列号与VCC输入
文件页数: 8/11页
文件大小: 231K
代理商: DS2411P
DS2411
8 of 11
1-WIRE SIGNALING
The DS2411 requires strict protocols to ensure data integrity. The protocol consists of four types of
signaling on one line: Reset Sequence with Reset Pulse and Presence Pulse, Write 0, Write 1, and Read
Data. Except for the presence pulse the bus master initiates all these signals. The DS2411 can
communicate at two different speeds: standard speed and Overdrive speed. If not explicitly set into the
Overdrive mode, the DS2411 will communicate at standard speed. While in Overdrive Mode the fast
timing applies to all waveforms.
To get from idle to active, the voltage on the 1-Wire line needs to fall from V
PUP
below the threshold V
TL
.
To get from active to idle, the voltage needs to rise from V
ILMAX
past the threshold V
TH
. The voltage
V
ILMAX
is relevant for the DS2411 when determining a logical level, but not for triggering any events.
The initialization sequence required to begin any communication with the DS2411 is shown in Figure 6.
A Reset Pulse followed by a Presence Pulse indicates the DS2411 is ready to receive data, given the
correct ROM and memory function command. In a mixed population network, the reset low time t
RSTL
needs to be long enough for the slowest 1-Wire slave device to recognize it as a reset pulse. If the bus
master uses slew-rate control on the falling edge, it must pull down the line for t
RSTL
+ t
F
to compensate
for the edge. A t
RSTL
duration of 480
μ
s or longer will exit the Overdrive Mode returning the device to
standard speed. If the DS2411 is in Overdrive Mode and t
RSTL
is no longer than 80
μ
s, the device will
remain in Overdrive Mode.
After the bus master has released the line it goes into receive mode (RX). Now, the 1-Wire bus is pulled
to V
PUP
via the pullup resistor or, in case of a DS2480B driver, by active circuitry. When the threshold
V
TH
is crossed, the DS2411 waits for t
PDH
and then transmits a Presence Pulse by pulling the line low for
t
PDL
. To detect a presence pulse, the master must test the logical state of the 1-Wire line at t
MSP
.
The t
RSTH
window must be at least the sum of t
PDHMAX
, t
PDLMAX
, and t
RECMIN
. Immediately after t
RSTH
is
expired, the DS2411 is ready for data communication. In a mixed population network, t
RSTH
should be
extended to minimum 480
μ
s at standard speed and 48
μ
s at Overdrive speed to accommodate other 1-
Wire devices.
Read/Write Time Slots
Data communication with the DS2411 takes place in time slots that carry a single bit each. Write time
slots transport data from bus master to slave. Read time-slots transfer data from slave to master. The
definitions of the write and read time slots are illustrated in Figure 7.
All communication begins with the master pulling the data line low. As the voltage on the 1-Wire line
falls below the threshold V
TL
, the DS2411 starts its internal timing generator that determines when the
data line will be sampled during a write time slot and how long data will be valid during a read time slot.
Master to Slave
For a
write-one
time slot, the voltage on the data line must have crossed the V
THMAX
threshold after the
write-one low time t
W1LMAX
is expired. For a
write-zero
time slot, the voltage on the data line must stay
below the V
THMIN
threshold until the write-zero low time t
W0LMIN
is expired. For most reliable
communication the voltage on the data line should not exceed V
ILMAX
during the entire t
W0L
window.
After the V
THMAX
threshold has been crossed, the DS2411 needs a recovery time t
REC
before it is ready for
the next time slot.
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