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参数资料
| 型号： | DS2430AX-S/T&R |
| 厂商： | Maxim Integrated |
| 文件页数： | 11/19页 |
| 文件大小： | 0K |
| 描述： | IC EEPROM 256BIT 4FCHIP |
| 标准包装： | 2,500 |
| 格式 - 存储器： | EEPROMs - 串行 |
| 存储器类型： | EEPROM |
| 存储容量： | 256（32 x 8） |
| 接口： | 1 线 串行 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 4-UFBGA，FCBGA |
| 供应商设备封装： | 4-覆晶（2.39x1.73） |
| 包装： | 带卷 (TR) |
Transaction Sequence
The sequence for accessing the DS2430A via the 1-Wire port is as follows:
DS2430A
?
?
?
?
Initialization
ROM Function Command
Memory Function Command
Transaction/Data
INITIALIZATION
All transactions on the 1-Wire bus begin with an initialization sequence. The initialization sequence
consists of a Reset Pulse transmitted by the bus master followed by a Presence Pulse(s) transmitted by the
slave(s).
The Presence Pulse lets the bus master know that the DS2430A is on the bus and is ready to operate. For
more details, see the 1-Wire Signaling section.
ROM FUNCTION COMMANDS
Once the bus master has detected a presence pulse, it can issue one of the four ROM function commands.
All ROM function commands are 8 bits long. A list of these commands follows (refer to flowchart in
Figure 8):
Read ROM [33h]
This command allows the bus master to read the DS2430A’s 8-bit family code, 48-bit serial number, and
8-bit CRC. This command can be used only if there is a single DS2430A on the bus. If more than one
slave is present on the bus, a data collision will occur when all slaves try to transmit at the same time
(open drain produces a wired-AND result). The resultant family code and 48-bit serial number usually
result in a mismatch of the CRC.
Match ROM [55h]
The Match ROM command, followed by a 64-bit ROM sequence, allows the bus master to address a
specific DS2430A on a multidrop bus. Only the DS2430A that exactly matches the 64-bit ROM sequence
will respond to the subsequent memory function command. All slaves that do not match the 64-bit ROM
sequence will wait for a Reset Pulse. This command can be used with a single or multiple devices on the
bus.
Skip ROM [CCh]
This command can save time in a single-drop bus system by allowing the bus master to access the
memory functions without providing the 64-bit ROM code. If more than one slave is present on the bus
and a read command is issued following the Skip ROM command, data collision will occur on the bus as
multiple slaves transmit simultaneously (open drain pulldowns produces a wired-AND result).
Search ROM [F0h]
When a system is initially brought up, the bus master might not know the number of devices on the 1-
Wire bus or their 64-bit ROM codes. The Search ROM command allows the bus master to use a process
of elimination to identify the 64-bit ROM codes of all slave devices on the bus. The Search ROM process
is the repetition of a simple, three-step routine: read a bit, read the complement of the bit, then write the
desired value of that bit. The bus master performs this simple, three-step routine on each bit of the ROM.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| DS2430E | 制造商:未知厂家 制造商全称:未知厂家 功能描述:NVRAM (EEPROM Based) |
| DS2430EN | 制造商:未知厂家 制造商全称:未知厂家 功能描述:NVRAM (EEPROM Based) |
| DS2430N | 制造商:未知厂家 制造商全称:未知厂家 功能描述:NVRAM (EEPROM Based) |
| DS2430Z | 制造商:未知厂家 制造商全称:未知厂家 功能描述:NVRAM (EEPROM Based) |
| DS2430ZN | 制造商:未知厂家 制造商全称:未知厂家 功能描述:NVRAM (EEPROM Based) |
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