DS2490
6 of 50
033199
used. Once determined, the value code for the Pulldown Slew Rate Control parameter should be stored in
the host and always be loaded into the DS2490 after a power-on or master reset cycle.
1-WIRE TIMING DIAGRAMS
This section explains the waveforms generated by the DS2490 on the 1-Wire bus in detail. First the
communication wave forms such as the Reset/Presence Detect Sequence and the time slots are discussed.
After that follows a detailed description of the pulse function under various conditions. The wave forms
generated by the DS2490 may deviate slightly from specifications found in the “Book of DS19xx iButton
Standards” or in data sheets of 1-Wire slave devices. However, the DS2490 has been designed to ensure
that the timing requirements are met.
1-Wire Communication Wave Forms
One of the major features of the DS2490 is that it relieves the host from generating the timing of the 1-
Wire signals and sampling the 1-Wire bus at the appropriate times. The reset/presence detect sequence is
shown in Figure 5. This sequence is composed of four timing segments: the reset low time t
RSTL
, the
short/interrupt sampling offset t
SI
, the presence detect sampling offset t
PDT
and a delay time t
FILL
. The
timing segments t
SI
, t
PDT
and t
FILL
comprise the reset high time t
RSTH
where 1-Wire slave devices assert
their presence or interrupt pulse. During this time the DS2490 pulls the 1-Wire bus high with its weak
pullup current.
The values of all timing segments for all 1-Wire speed options are shown in the table. Since the
reset/presence sequence is slow compared to the time slots, the values for regular and flexible speed are
the same. Except for the falling edge of the presence pulse, all edges are controlled by the DS2490. The
shape of the uncontrolled falling edge is determined by the capacitance of the 1-Wire bus and the number,
speed and sink capability of the slave devices connected.
RESET/PRESENCE DETECT
Figure 5
Speed
Regular
Overdrive
Flexible
tRSTL
512 μs
64 μs
512 μs
tSI
8 μs
2 μs
8 μs
tPDT
64 μs
8 μs
64 μs
tFILL
512 μs
64 μs
512 μs
tRSTH
584 μs
74 μs
584 μs
Upon executing a 1-WIRE RESET command (see COMMUNICATION COMMANDS), the DS2490
pulls the 1-Wire bus low for t
RSTL
and then lets it go back to 5V. The DS2490 will now wait for the
short/interrupt sampling offset t
SI
to expire and then test the voltage on the 1-Wire bus to determine if
there is a short or an interrupt signal. If there is no short or interrupt (as shown in the picture), the