参数资料
| 型号： | DS24B33S+ |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 9/23页 |
| 文件大小： | 0K |
| 描述： | IC EEPROM 4KBIT 8SOIC |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 1 |
| 格式 - 存储器： | EEPROMs - 串行 |
| 存储器类型： | EEPROM |
| 存储容量： | 4K (256 x 16) |
| 接口： | 1 线 |
| 电源电压： | 2.8 V ~ 5.25 V |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 8-SOIC（0.209"，5.30mm 宽） |
| 供应商设备封装： | 8-SO |
| 包装： | 管件 |
DS24B33
1-Wire 4Kb EEPROM
Memory Function Commands
The Memory Function Flowchart (Figure 7) describes
the protocols necessary for accessing the memory of
the DS24B33. The target address registers TA1 and
TA2 are used for both read and write. The communica-
tion between the master and the DS24B33 takes place
either at standard speed (default, OD = 0) or at over-
drive speed (OD = 1). If not explicitly set into the over-
drive mode, the DS24B33 assumes standard speed.
Write Scratchpad [0Fh]
The Write Scratchpad command applies to the data
memory. After issuing the Write Scratchpad command,
the master must first provide the 2-byte target address,
followed by the data to be written to the scratchpad.
The data is written to the scratchpad starting at the byte
offset of T[4:0]. The ES bits E[4:0] are loaded with the
starting byte offset and increment with each subse-
quent byte. Effectively, E[4:0] is the byte offset of the
last full byte written to the scratchpad. Only full bytes
are accepted. If the last byte is incomplete, its content
is ignored and PF is set.
When executing the Write Scratchpad command, the
CRC generator inside the DS24B33 (Figure 13) calcu-
lates a 16-bit CRC of the entire data stream, starting at
the command code and ending at the last data byte as
sent by the master. This CRC is generated using the
CRC-16 polynomial (X 16 + X 15 + X 2 + 1) by first clear-
ing the CRC generator and then shifting in the com-
mand code (0Fh) of the Write Scratchpad command,
the target addresses TA1 and TA2 as supplied by the
master, and all the data bytes. The master can end the
Write Scratchpad command at any time. However, if the
end of the scratchpad is reached (E[4:0] = 11111b),
the master can send 16 read time slots to receive the
CRC generated by the DS24B33.
The DS24B33 ’s memory address range is 0000h to
01FFh. If the bus master sends a target address higher
than this, the DS24B33’s internal circuitry sets the 7
most significant address bits to zero as they are shifted
into the internal address register. The Read Scratchpad
command reveals the modified target address. The
master identifies such address modifications by com-
paring the target address read back to the target
address transmitted. If the master does not read the
scratchpad, a subsequent Copy Scratchpad command
does not work because the most significant bits of the
target address the master sends do not match the
value that the DS24B33 expects.
Maxim Integrated
Read Scratchpad [AAh]
The Read Scratchpad command allows for verifying the
target address and the integrity of the scratchpad data.
After issuing the command code, the master begins
reading. The first 2 bytes are the target address. The
next byte is the ending offset/data status byte (E/S) fol-
lowed by the scratchpad data beginning at the byte off-
set (T[4:0]). The master should read through the end of
the scratchpad. If the master continues reading beyond
the end of the scratchpad, all data are logic 1s.
Copy Scratchpad [55h]
The Copy Scratchpad command is used to copy data
from the scratchpad to the data memory. After issuing
the Copy Scratchpad command, the master must pro-
vide a 3-byte authorization pattern, which should have
been obtained by an immediately preceding Read
Scratchpad command. This 3-byte pattern must exactly
match the data contained in the three address registers
(TA1, TA2, E/S, in that order). If the pattern matches
and the target address is valid, the AA flag is set and
the copy begins. The data to be copied is determined
by the three address registers. The scratchpad data
from the beginning offset through the ending offset is
copied to memory, starting at the target address.
Anywhere from 1 to 32 bytes can be copied with this
command. The duration of the device’s internal data
transfer is t PROG , during which the voltage on the
1-Wire bus must not fall below V PUPMIN . A pattern of
alternating 0s and 1s are transmitted after the data has
been copied until the master issues a reset pulse.
Note: Because of the memory architecture of the
DS24B33, if a Copy Scratchpad command is interrupted
during the write cycle, two consecutive Copy
Scratchpad commands of the same data to the same
location may be necessary to recover. To verify the suc-
cess of the Copy Scratchpad command, always look for
the alternating 0-to-1 pattern at the end of the Copy
Scratchpad command flow and also read back the EEP-
ROM page that was to be updated. If the alternating
pattern appeared and the EEPROM page data shows
the intended new data, the write access was successful.
No further action is required. In all other cases (alternat-
ing 0-to-1 pattern is not seen or nonmatching EEPROM
page data), repeat the Write Scratchpad, Copy
Scratchpad sequence until successful.
9
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相关代理商/技术参数 |
参数描述 |
|---|---|
| DS24B33S R | 制造商:MAXIM 制造商全称:Maxim Integrated Products 功能描述:1-Wire 4Kb EEPROM |
| DS24B33S T | 制造商:MAXIM 制造商全称:Maxim Integrated Products 功能描述:1-Wire 4Kb EEPROM |
| DS24B33S TR | 制造商:MAXIM 制造商全称:Maxim Integrated Products 功能描述:1-Wire 4Kb EEPROM |
| DS24B33S+ | 功能描述:电可擦除可编程只读存储器 1-Wire 4kbit 电可擦除可编程只读存储器 RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 |
| DS24B33S+R | 制造商:MAXIM 制造商全称:Maxim Integrated Products 功能描述:4Kb 1-Wire EEPROM with 200k Write/Erase Cycles |
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