参数资料
型号: DS26334
英文描述: 3.3V, 16-Channel, E1/T1/J1 Short and Long-Haul Line Interface Unit
中文描述: 3.3V、16路、E1/T1/J1短/长程线路接口单元
文件页数: 15/115页
文件大小: 756K
代理商: DS26334
DS26334 3.3V, 16-Channel, E1/T1/J1 Short/Long-Haul Line Interface Unit
15 of 115
NAME
PIN
TYPE
FUNCTION
D7/AD7
D6/AD6
D5/AD5
D4/AD4
D3/AD3
D2/AD2
D1/AD1
D0/AD0
N3
P3
M4
L5
K7
P4
M5
L6
I/O,
tri-state
Data Bus 7–0.
In nonmultiplexed host mode, these pins are the
bidirectional data bus.
Address/Data Bus 7–0.
In multiplexed host mode, these pins are the
bidirectional address/data bus.
Note:
AD7 and AD6 do not carry
address information.
In serial host mode, these pins should be grounded.
A5/BSWP
E4
I
Address 5.
In the host nonmultiplexed mode, this is the most
significant bit of the address bus.
Bit Swap.
In serial host mode, this bit defines the serial data position
to be MSB first when low and LSB first when high.
In multiplexed host mode, this pin should be grounded.
A4
A3
A2
A1
A0
C4
H5
G3
H3
N10
I
Address Bus 4–0.
These five pins are address pins in the parallel
host mode.
In serial host mode and multiplexed host mode, these pins should be
grounded.
OE
R12
I
Output Enable.
If this pin is pulled low all the transmitters outputs
(TTIP and TRING) are high impedance. If pulled high all the
transmitters are enabled when the associated Output Enable
OE
bit is
set.
If GC.RTCTL is set, the OE pin is granted control of the receiver
internal termination. When OE is low, receiver internal termination will
be high impedance. When OE is high, receiver termination will be
enabled. The receiver can still monitor incoming signals even when
termination is in high impedance.
CLKE/MUX
T14
I
Clock Edge.
If CLKE is high, SDO is clocked out on falling edge of
SCLK and if low SDO is on rising edge of SCLK.
Multiplexed/Nonmultiplexed Select Pin.
When in parallel port
mode, this pin is used to select multiplexed address and data
operation or separate address and data. When mux is a high
multiplexed address and data is used and when mux is low
nonmultiplexed is used.
JTAG
TRSTB
E15
I,
pullup
JTAG Test Port Reset.
This pin if low will reset the JTAG port. If not
used it can be left floating.
JTAG Test Mode Select.
This pin is clocked on the rising edge of
TCK and is used to control the JTAG selection between scan and
Test Machine control.
JTAG Test Clock.
The data TDI and TMS are clocked on rising edge
of TCK and TDO is clocked out on the falling edge of TCK.
JTAG Test Data Out.
This is the serial output of the JTAG port. The
data is clocked out on the falling edge of TCK.
Test Data Input.
This pin input is the serial data of the JTAG Test.
The data on TDI is clocked on the rising edge of TCK. This pin can be
left unconnected.
TMS
B13
I,
pullup
TCK
D14
I
TDO
A15
O,
high-Z
TDI
B15
I,
pullup
相关PDF资料
PDF描述
DS26334G 3.3V, 16-Channel, E1/T1/J1 Short and Long-Haul Line Interface Unit
DS26334GN 3.3V, 16-Channel, E1/T1/J1 Short and Long-Haul Line Interface Unit
DS26503 T1/E1/J1 BITS Element
DS26503L T1/E1/J1 BITS Element
DS26503LN T1/E1/J1 BITS Element
相关代理商/技术参数
参数描述
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