参数资料
型号: DS26519DK
厂商: Maxim Integrated Products
文件页数: 12/42页
文件大小: 0K
描述: KIT DEMO FOR DS26519
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
设计资源: DS26519DK Gerber Files
标准包装: 1
主要目的: 电信,调帧器和线路接口装置(LIU)
已用 IC / 零件: DS26519
已供物品: 板,CD
DS26519DK
Register Name: TSYNCSRC1
Register Description: TSYNC SOURCE 1
Register Offset: 0x0116
Bit #
Name
Default
7
RSYNC4
0
6
SYNC4
0
5
RSYNC3
0
4
SYNC3
0
3
RSYNC2
0
2
SYNC2
0
1
RSYNC1
0
0
SYNC1
0
Note: A one written to bit SYNCn connects TSYNCnO to a common internal SYNC net. A one written to RSYNCn
connects RSYNCn to TSYNCnO. If both RSYNCn and SYNCn are written a one, TSYNCnO is driven to a logic 1. If
both RSYNCn and SYNCn are written a zero, TSYNCnO is held at zero.
Register Name: TSYNCSRC2
Register Description: TSYNC SOURCE 2
Register Offset: 0x0117
Bit #
Name
Default
7
RSYNC8
0
6
SYNC8
0
5
RSYNC7
0
4
SYNC7
0
3
RSYNC6
0
2
SYNC6
0
1
RSYNC5
0
0
SYNC5
0
Note: A one written to bit SYNCn connects TSYNCnO to a common internal SYNC net. A one written to RSYNCn
connects RSYNCn to TSYNCnO. If both RSYNCn and SYNCn are written a one, TSYNCnO is driven to a logic 1. If
both RSYNCn and SYNCn are written a zero, TSYNCnO is held at zero.
Register Name: RSYNCSRC1
Register Description: RSYNC SOURCE 1
Register Offset: 0x0118
Bit #
Name
Default
7
TSYNC4
0
6
SYNC4
0
5
TSYNC3
0
4
SYNC3
0
3
TSYNC2
0
2
SYNC2
0
1
TSYNC1
0
0
SYNC1
0
Note: A one written to bit SYNCn connects RSYNCnO to a common internal SYNC net. A one written to TSYNCn
connects TSYNCn to RSYNCnO. If both TSYNCn and SYNCn are written a one, RSYNCnO is driven to a logic 1. If
both TSYNCn and SYNCn are written a zero, RSYNCnO is held at zero.
Register Name: RSYNCSRC2
Register Description: RSYNC SOURCE 2
Register Offset: 0x0119
Bit #
Name
Default
7
TSYNC8
0
6
SYNC8
0
5
TSYNC7
0
4
SYNC7
0
3
TSYNC6
0
2
SYNC6
0
1
TSYNC5
0
0
SYNC5
0
Note: A one written to bit SYNCn connects RSYNCnO to a common internal SYNC net. A one written to TSYNCn
connects TSYNCn to RSYNCnO. If both TSYNCn and SYNCn are written a one, RSYNCnO is driven to a logic 1. If
both TSYNCn and SYNCn are written a zero, RSYNCnO is held at zero.
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