参数资料
型号: DS2703UT
英文描述: SHA-1 Battery Pack Authentication IC
中文描述: SHA - 1的电池组认证IC
文件页数: 6/20页
文件大小: 238K
代理商: DS2703UT
DS2703 SHA-1 Battery Pack Authentication IC
6 of 20
Table 1. Variable Initiation
A
B
C
D
E
[31:0]
67h
EFh
98h
10h
C3h
[23:16]
45h
CDh
BAh
32h
D2h
[15:8]
23h
ABh
DCh
54h
E1h
[7:0]
01h
89h
FEh
76h
F0h
The 160-bit MAC is computed per FIPS 180, including the addition of constants H0-H4. Adding H0-H4 is necessary
only to maintain compliance with FIPS 180. The computed MAC is held in the A-E register memory and then
returned as a 160-bit serial stream, beginning with the least significant bit of variable A.
Table 2. Message Authentication Code (MAC) Return Format
A[31:24]
A[23:16]
B[31:24]
B[23:16]
C[31:24]
C[23:16]
D[31:24]
D[23:16]
E[31:24]
E[23:16]
SHA-1 HASH ALGORITHM
General Definitions
:
This description of the SHA computation is adapted from the Secure Hash Standard SHA-1 document. The
algorithm takes as its input data 16, 32-bit words M
t
(0
t
15) as shown in the SHA-1 Input Message Format
tables. The SHA computation involves six 32-bit word variables labeled A, B, C, D, E, and TMP, five 32-bit word
constants labeled H0, H1, H2, H3, and H4, a sequence of eighty 32-bit words called W
t
(0
t
79), a sequence of
eighty 32-bit words called K
t
(0
t
79), and a Boolean function f
t
(B,C,D) (0
t
79). The operations required for
the SHA computation are arithmetic addition without carry ("+"), logical inversion or 1's complement ("\"), logical
XOR (" "), logical AND ("^"), logical OR ("v"), concatenation of 32-bit values (“|”), assignment (":=") and circular
shifting within a 32-bit word. The expression S
(X) represents a circular shift of X by n positions to the left, with X
being a 32-bit word.
The function f
t
is defined as follows:
f
t
(B,C,D) =
(B^C)v((B\)^D)
(0
t
19)
=
B C D
(20
t
39)
=
(B^C)v(B^D)v(C^D)
(40
t
59)
=
B C D
(60
t
79)
The sequence K
t
(0
t
79) is defined as follows:
K
t
:=
5A827999h
(0
t
19)
6ED9EBA1h
(20
t
39)
8F1BBCDCh
(40
t
59)
CA62C1D6h
(60
t
79)
The sequence W
t
(0
t
79) is defined as follows:
W
t
:=
M
t
(see table, FIPS-180 compliant input block)
S
1
(W
t-3
W
t-8
W
t-14
W
t-16
) (16
t
79)
A[15:8]
B[15:8]
C[15:8]
D[15:8]
E[15:8]
A[7:0]
B[7:0]
C[7:0]
D[7:0]
E[7:0]
(0
t
15)
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