参数资料
型号: DS2712Z+T&R
厂商: Maxim Integrated Products
文件页数: 9/15页
文件大小: 0K
描述: IC NIMH CHARGER 16SOIC
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
功能: 充电管理
电池化学: 镍金属氢化物
电源电压: 4 V ~ 5.5 V
工作温度: -20°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 16-SOIC(0.154",3.90mm 宽)
供应商设备封装: 16-SOIC
包装: 带卷 (TR)
DS2711/DS2712: Loose-Cell NiMH Chargers
Undervoltage Lockout (UVLO)
The UVLO circuit serves as a power-up and brownout detector by monitoring V DD to prevent charging until V DD
rises above V UVLO , or when V DD drops below V UVLO - V HYS . If UVLO is active, charging is prevented, the state
machine is forced to the RESET state, and all charge timers are reset. A 10 μ s deglitch circuit provides noise
immunity.
Internal Oscillator and Clock Generation
An internal oscillator provides the main clock source used to generate timing signals for internal chip operation. The
precharge timer, hold-off timers, and timings for CC1/CC2 operation and cell testing are derived from this timebase.
Current-Sense Amplifier (DS2711)
An error amplifier block provides several options to regulate the charge current. The 20mA open-drain output can
drive a PMOS or PNP pass element for linear regulation, or the output can drive an optocoupler for isolated
feedback to a primary-side PWM controller. The VN0 pin is a remote-sense return and should be connected to the
grounded side of the sense resistor using a separate, insulated conductor.
Figure 6. Current-Sense Amplifier Response
1.20
1.00
0.80
0.60
0.40
0.20
Gain
Phase
0
-50
-100
-150
-200
-250
0.00
10
1
10
2
10
3
10
4
10
5
10
6
10
7
-300
Frequency (Hertz)
The open-loop amplifier response shown in Figure 6 was measured with I CSOUT = -1mA. An error signal between
the current-sense signal (across a sense resistor) and the 0.125V internal reference is produced so the voltage
across the sense resistor is maintained at V IREF in a closed-loop circuit.
Current-Sense Comparator (DS2712)
The comparator in the DS2712 switches between ON and OFF and is capable of driving a PNP bipolar or a PMOS
transistor, enabling the use of a switched-mode power stage. Hysteresis on the comparator input provides noise
rejection. In the closed-loop regulation circuit of Figure 5, the comparator regulates voltage across the sense
resistor to a DC average of:
V RSNS = V IREF - 0.5 x V HYS-COMP = 0.125V
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