参数资料
型号: DS2731E+T&R
厂商: Maxim Integrated Products
文件页数: 17/20页
文件大小: 0K
描述: IC MANAGEMENT BACKUP 28-TSSOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
功能: 备份管理
电池化学: 锂离子(Li-Ion)
电源电压: 10.8 V ~ 13.2 V
工作温度: -20°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 28-SOIC(0.173",4.40mm 宽)裸露焊盘
供应商设备封装: 28-TSSOP 裸露焊盘
包装: 带卷 (TR)
Cache-Memory Battery-Backup Management IC
Layout
Due to high-frequency switching, high-current loops,
and large-voltage switching, special consideration
should be taken for layout of the DS2731 board in order
to reduce EMI.
CCCV Charger
The CCCV charger generates a high-current loop from
VIN to CHG1 and CHG2 to CGND1 and CGND2. Also,
large dV/dT is generated at CHG1 and CHG2 from the
switching on and off of the 12V supply. These combine
to generate magnetic and electric fields. To reduce
these fields, the high-current loop should be made as
small as possible. Traces should be routed point-to-
point, as straight as possible, and a ground plane/shield
should be used to isolate the noise from nearby compo-
nents. Also, the trace width of the charge path should
be sufficiently large enough to accommodate the high
current. SNS and BATT+ should be connected as close
as possible to the SNS resistor and BATT+ terminal for
accurate current regulation and battery voltage mea-
surements.
The AGND pin is the analog reference connection. No
charge current flows into AGND. It should be connect-
ed as close as possible to the negative terminal of the
battery. This allows for a more accurate battery voltage
measurement by avoiding any voltage drops caused
by stray resistance in the high-current charge path.
Cache-Memory Buck Regulator
Even though the voltages and currents are not as high
as the CCCV charger, care still needs to be taken dur-
ing layout of the memory buck regulator. There are fast-
transient voltages at LX. The fast-transient current loop
is from CIN to LX to SGND. Again, the current loop
should be routed as small as possible and ground
shielding should be used to isolate the circuit.
Power-Failure Switchover
During a power-failure event, the DS2731 can assume
responsibility for supplying power to the cache memory
using the backup battery. As long as the 2MHz internal
synchronous buck regulator is enabled and the battery
voltage is above LO_BATT, the buck regulator supplies
power to the memory. During normal power the buck
regulator runs off of the aux input voltage. The DS2731
monitors the aux input voltage for power failure. During
a power-failure event, the DS2731 internally switches
the buck-regulator supply to the battery backup. The
battery is connected internally by a break-before-make
switching mux. The break-before-make circuitry
ensures that the battery is never connected to the 3.3V
aux supply. The capacitor on the CIN pin provides
power to the IC during switchover. If the buck regulator
is disabled during normal power conditions, ENS must
be driven low by the system when a loss of power is
detected.
Auxiliary Voltage
The aux switch monitors the aux power supply. In the
system, this supply fails before the cache-memory
power supply. When it crosses 2.93V, a comparator in
the DS2731 activates the power multiplexer and switch-
es the power source for the buck regulator from the aux
power to the battery. This occurs as a break-before-
make operation to prevent current from flowing out of
the battery into the aux supply.
Bypass/Holdup Capacitor
The bypass/holdup capacitor, connected to pin CIN, is
sized to be able to support full input current to the switch-
er in the case where the ENS pin is low when the aux volt-
age falls below 2.93V. Since the power mux is
break-before-make, the capacitor supplies power during
the handover operation. Prior to the event, the capacitor
is charged to 2.93V, and immediately afterwards it is con-
nected to the battery voltage through the 1 ? mux switch.
If power is restored, the conduction path between the
battery and holdup capacitor is opened before the
capacitor is connected to the 3.3V aux supply.
Enable Switcher
The buck regulator is enabled by the ENS pin. If the pin
is low, the regulator turns on supplying power to the
cache memory. The ENS pin should be driven low by
the system when the cache memory has halted active
processing and is in its data-retention/refresh mode.
______________________________________________________________________________________
17
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