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参数资料
| 型号： | DS2762AE+025/T&R |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 23/25页 |
| 文件大小： | 0K |
| 描述： | IC MON BATT LI-ION HP 16-TSSOP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 1,000 |
| 功能： | 电池监控器 |
| 电池化学： | 锂离子（Li-Ion） |
| 电源电压： | 2.5 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 16-TSSOP |
| 包装： | 带卷 (TR) |
DS2762 High-Precision Li+ Battery Monitor With Alerts
I/O SIGNALING
The 1-Wire bus requires strict signaling protocols to ensure data integrity. The four protocols used by the DS2762
are as follows: the initialization sequence (reset pulse followed by presence pulse), write 0, write 1, and read data.
The bus master initiates all these types of signaling except the presence pulse.
The initialization sequence required to begin any communication with the DS2762 is shown in Figure 18. A
presence pulse following a reset pulse indicates that the DS2762 is ready to accept a net address command. The
bus master transmits (Tx) a reset pulse for t RSTL . The bus master then releases the line and goes into receive mode
(Rx). The 1-Wire bus line is then pulled high by the pullup resistor. After detecting the rising edge on the DQ pin,
the DS2762 waits for t PDH and then transmits the presence pulse for t PDL .
Figure 18. 1-Wire Initialization Sequence
t RSTL
t PDH
t PDL
t RSTH
PACK+
DQ
PACK-
LINE TYPE LEGEND:
BUS MASTER ACTIVE LOW
BOTH BUS MASTER AND
DS2762 ACTIVE LOW
RESISTOR PULLUP
DS2762 ACTIVE LOW
WRITE-TIME SLOTS
A write-time slot is initiated when the bus master pulls the 1-Wire bus from a logic-high (inactive) level to a logic-low
level. There are two types of write-time slots: write 1 and write 0. All write-time slots must be t SLOT (60 m s to 120 m s)
in duration with a 1 m s minimum recovery time, t REC , between cycles. The DS2762 samples the 1-Wire bus line
between 15 m s and 60 m s after the line falls. If the line is high when sampled, a write 1 occurs. If the line is low when
sampled, a write 0 occurs (Figure 19). For the bus master to generate a write 1 time slot, the bus line must be
pulled low and then released, allowing the line to be pulled high within 15 m s after the start of the write time slot. For
the host to generate a write 0 time slot, the bus line must be pulled low and held low for the duration of the write-
time slot.
READ-TIME SLOTS
A read-time slot is initiated when the bus master pulls the 1-Wire bus line from a logic-high level to a logic-low level.
The bus master must keep the bus line low for at least 1 m s and then release it to allow the DS2762 to present valid
data. The bus master can then sample the data t RDV (15 m s) from the start of the read-time slot. By the end of the
read-time slot, the DS2762 releases the bus line and allows it to be pulled high by the external pullup resistor. All
read-time slots must be t SLOT (60 m s to 120 m s) in duration with a 1 m s minimum recovery time, t REC , between cycles.
See Figure 19 for more information.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| DS2762AR | 制造商:MAXIM 制造商全称:Maxim Integrated Products 功能描述:High-Precision Li+ Battery Monitor With Alerts |
| DS2762AX/T&R | 功能描述:电池管理 High-Prec Li+ Bat Monitor w/Alerts RoHS:否 制造商:Texas Instruments 电池类型:Li-Ion 输出电压:5 V 输出电流:4.5 A 工作电源电压:3.9 V to 17 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:VQFN-24 封装:Reel |
| DS2762AX/TR | 制造商:MAXIM 制造商全称:Maxim Integrated Products 功能描述:High-Precision Li+ Battery Monitor With Alerts |
| DS2762AX-025/T&R | 制造商:Maxim Integrated Products 功能描述:IC BATTERY MONITOR LI+ FLIPCHIP |
| DS2762AX-025/T&R | 功能描述:电池管理 High-Prec Li+ Bat Monitor w/Alerts RoHS:否 制造商:Texas Instruments 电池类型:Li-Ion 输出电压:5 V 输出电流:4.5 A 工作电源电压:3.9 V to 17 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:VQFN-24 封装:Reel |
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