参数资料
型号: DS2790E+
厂商: Maxim Integrated Products
文件页数: 23/41页
文件大小: 0K
描述: IC FUEL GAUGE BATT 28TSSOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 100
功能: 燃料,电量检测计/监控器
电池化学: 锂离子(Li-Ion)
电源电压: 2.5 V ~ 5.5 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 28-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 28-TSSOP
包装: 管件
DS2790 Programmable 1-Cell Li-Ion Fuel Gauge and Protector
I/O PORTS
The DS2790 includes a simple input/output (I/O) data port. From a software perspective, the port appears as a
group of Special Function Registers within module M0. The simple I/O port defined for this product is described
below:
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?
?
?
?
CMOS input buffers
Four open drain output drivers with selectable tri-state or weak pullups
Two selectable open drain or push-pull output drivers with selectable tri-state
Support alternate functions and TAP controller interface signals
Two pins have interrupt capability
The port is accessed through five peripheral registers (PO, PI, PAF, PPU, and EIC) addressed either by byte or by
individual bit locations. The I/O port is designed to provide programming flexibility for the application. All individual
I/O pins are independently configured; and can be defined as an input, output, or alternate function. Table 7
summarizes the functionality of the I/O pins.
Table 7. I/O Port Pins
FUNCTIONS
CHARACTERISTICS
TAP
TDI
Weak Active Pullup Strong Active Pullup
Primary
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
SDA
SCL
Alternate
INT0
INT1
RST*
-
-
-
-
-
*
*
TMS *
TCK *
TDO*
-
-
-
Bidirectional
Configurable, [In]
Configurable, [In]
Configurable, [In]
Configurable, [In]
Configurable, [In]
Configurable, [In]
Yes
Yes
Weak Passive
Pulldown
- Configurable, [Off] -
- Configurable, [Off] -
- Configurable, [Off] -
- Configurable, [Off] -
- - Configurable, [Off]
- - Configurable, [Off]
Configurable, [On] Configurable, [Off] -
Configurable, [On] Configurable, [Off] -
Note: Reset values are denoted with an * and by [].
PI register : The PI register is a read only input of the I/O pins. When the register is read, the logic level of each pin
is reported in the corresponding bit locations. Reading a logic low or high on a pin does not change the output drive
on that pin.
PO register : The PO register controls the output state of the I/O pins. Data written to this register determines the
pin output drive. When a bit is written to a “0” (cleared), the N-channel output drive transistor is enabled, and the
pullup is disabled. When bit is written to a “1” (set), the N-channel output drive transistor is disabled, and the pullup
enabled (if so configured). The PO bits are set asynchronously during power-on reset to disable the N-channel
output drive. PO bits are not altered in SLEEP mode, however drive to the N-channel is disabled.
PPU register : The PPU register contains independent bits that define each pin as hi-Z or pulled up when its N-
channel output drive transistor is disabled. P0.0 through P0.3 have weak pullups, P0.4 and P0.5 have strong
pullups. When the output is disabled and the PPU bit is cleared, the pin is high impedance. When the output is
disabled and the PPU bit is set, the pin’s weak or strong pullup is enabled. When the PPU bit is set and the device
enters STOP mode, the weak pullup remains enabled.
PAF register : The PAF register enables or disables the alternate functions of P0.0-P0.2. When a pin’s PAF bit is
cleared, the pin is controlled by the PI, PO, PPU, and EIC registers. When the PAF bit is set, the pin operates in its
alternate function mode. The RST function of P0.2 can be disabled by writing the RSTD bit to 1.
EIC register : The lower six bits of the EIC register are the Port Interrupt Control bits. The Port Interrupt Control bits
are used to enable and configure detection of external interrupts. Interrupt enable bits, PIE.0 and PIE.1, enable
detection of an interrupt on pins P0.0 and P0.1 respectively. Interrupt type bits, PIT.0 and PIT.1, define the type
(level or edge) of interrupt on pins P0.0 and P0.1 respectively. Interrupt polarity bits, PIP.0 and PIP.1, determine
the interrupt polarity on pins P0.0 and P0.1, respectively.
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