参数资料
| 型号： | DS28EC20P+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 10/27页 |
| 文件大小： | 0K |
| 描述： | IC EEPROM 20KBIT 6TSOC |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 4,000 |
| 格式 - 存储器： | EEPROMs - 串行 |
| 存储器类型： | EEPROM |
| 存储容量： | 20K（256 x 80） |
| 接口： | 1 线 串行 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 6-LSOJ |
| 供应商设备封装： | 6-TSOC |
| 包装： | 带卷 (TR) |
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DS28EC20: 20Kb 1-Wire EEPROM
ADDRESS REGISTERS AND TRANSFER STATUS
The DS28EC20 employs three address registers: TA1, TA2, and E/S (Figure 6). Registers TA1 and TA2 must be
loaded with the target address to which the data is written or from which data is read. Register E/S is a read-only
transfer status register used to verify data integrity with write commands. E/S bits E[4:0] are loaded with the
incoming T[4:0] on a Write Scratchpad command and increment on each subsequent data byte. This is, in effect, a
byte-ending offset counter within the 32-byte scratchpad. Bit 5 of the E/S register, called PF, is set if the number of
data bits sent by the master is not an integer multiple of 8 or if the data in the scratchpad is not valid due to a loss
of power. A valid write to the scratchpad clears the PF bit. Bit 6 has no function; it always reads 0. The highest
valued bit of the E/S register, called authorization accepted (AA), is valid only if the PF flag reads 0. If PF is 0 and
AA is 1, the data stored in the scratchpad has already been copied to the target memory address. Writing data to
the scratchpad clears this flag.
Figure 6. Address Registers
Bit #
Target Address (TA1)
Target Address (TA2)
Ending Address with
Data Status (E/S)
(Read Only)
7
T7
T15
AA
6
T6
T14
0
5
T5
T13
PF
4
T4
T12
E4
3
T3
T11
E3
2
T2
T10
E2
1
T1
T9
E1
0
T0
T8
E0
WRITING WITH VERIFICATION
To write data to the DS28EC20, the scratchpad must be used as intermediate storage. First, the master issues the
Write Scratchpad command to specify the desired target address, followed by the data to be written to the
scratchpad. Under certain conditions (see the Write Scratchpad Command section) the master receives an inverted
CRC16 of the command, address (actual address sent), and data at the end of the Write Scratchpad command
sequence. Knowing this CRC value, the master can compare it to the value it has calculated itself to decide if the
communication was successful and precede to the Copy Scratchpad command. If the master could not receive the
CRC16, it should send the Read Scratchpad command to verify data integrity. As a preamble to the scratchpad
data, the DS28EC20 repeats the target address TA1 and TA2 and sends the contents of the E/S register. If the PF
flag is set, data did not arrive correctly in the scratchpad or there was a loss of power since data was last written to
the scratchpad. The master does not need to continue reading; it can start a new trial to write data to the
scratchpad. Similarly, a set AA flag together with a cleared PF flag indicates that the device did not recognize the
Write command. If everything went correctly, both flags are cleared and the ending offset indicates the address of
the last byte written to the scratchpad. Now the master can continue reading and verifying every data byte. After
the master has verified the data, it can send the Copy Scratchpad command, for example. This command must be
followed exactly by the data of the three address registers TA1, TA2, and E/S. The master should obtain the
contents of these registers by reading the scratchpad. As soon as the DS28EC20 has received these bytes
correctly, it starts copying the scratchpad data to the requested location, provided that the target memory is not
copy protected, the PF flag is cleared, and there was no Read Memory or Extended Read Memory command
issued between Write Scratchpad and Copy Scratchpad.
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相关代理商/技术参数 |
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| DS28EC20Q-A5A-5A+T | 制造商:Maxim Integrated Products 功能描述:20KB 1-WIRE EEPROM - Tape and Reel |
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