参数资料
型号: DS3144DK
厂商: Maxim Integrated Products
文件页数: 4/20页
文件大小: 0K
描述: KIT DEMO FOR DS3144
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 1
主要目的: 电信,调帧器
已用 IC / 零件: DS3144
已供物品: 主板和子卡组套
DS3144 DS3/E3 Framer Demo Kit Daughter Card
MEMORY MAP
DK101 daughter card address space begins at 0x81000000.
DK2000 daughter card address space begins at:
0x30000000 for slot 0
0x40000000 for slot 1
0x50000000 for slot 2
0x60000000 for slot 3
All offsets in Table 1 below are relative to the beginning of the daughter card address space.
Table 1. Daughter Card Address Map
DS3/E3
PORT NUMBER
1
2
3
4
DS3144 OFFSET
0x1300 to 0x13FF
0x1000 to 0x10FF
0x1100 to 0x11FF
0x1200 to 0x12FF
DS3154 OFFSET
0x2030 to 0x203F
0x2010 to 0x201F
0x2020 to 0x202F
0x2000 to 0x200F
FPGA OFFSET
0x0010 to 0x001F
0x0020 to 0x002F
0x0030 to 0x003F
0x0040 to 0x004F
All offsets in Table 2 below are relative to the daughter card address space plus the DS3/E3 port offset in Table 1.
Table 2. DS3144DK FPGA Register Map
OFFSET
0x0000
0x0002
0x0003
0x0004
0x0005
0x0006
0x0007
0x000A
0x000B
0x000C
0x000D
0x000E
REGISTER
BID
XBIDH
XBIDM
XBIDL
BREV
AREV
PREV
PCTC_SR
PCTS_SR
PCRX_SR
PCRC_SR
PCRS_SR
TYPE
Read-Only
Read-Only
Read-Only
Read-Only
Read-Only
Read-Only
Read-Only
Control
Control
Control
Control
Control
DESCRIPTION
Board ID
High Nibble Extended Board ID
Middle Nibble Extended Board ID
Low Nibble Extended Board ID
Board Fab Revision
Board Assembly Revision
PLD Revision
PCM_TXCLK Source
PCM_TSYNC Source
PCM_RXD Source
PCM_RXCLK Source
PCM_RSYNC Source
0x0010
0x0020
0x0030
TDAT_SR
Control
DS3144 TDAT Source
0x0040
0x0011
0x0021
0x0031
TICK_SR
Control
DS3144 TICLK Source
0x0041
0x0012
0x0022
0x0032
TSOF_SR
Control
DS3144 TSOF Source
0x0042
Registers in the FPGA can be easily modified using the ChipView software and the definition file named
DS3144DC_FPGA.def. Registers 0x00 through 0x07 (excluding register 0x01, which has no function on the
DS3144DK) are read-only and are programmed at the factory to document board identification and revision
information. The remaining registers in the FPGA control the connection of the DS3144’s equipment-side framer
pins. With these control registers, the framers within the DS3144 can be looped back on themselves externally,
connected to each other back-to-back, or connected to the DK2000 motherboard.
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