参数资料
型号: DS32512N+
厂商: Maxim Integrated Products
文件页数: 38/130页
文件大小: 0K
描述: IC LIU DS3/E3/STS-1 12P 484-BGA
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 30
类型: 线路接口装置(LIU)
规程: DS3
电源电压: 3.135 V ~ 3.465 V
安装类型: 表面贴装
封装/外壳: 484-BGA
供应商设备封装: 484-BGA(23x23)
包装: 管件
DS32506/DS32508/DS32512
15 of 130
NAME
TYPE
FUNCTION
Ipd
Receive Power-Down (All Ports)
Ipd
Jitter Attenuator Depth (All Ports)
Ipd
Jitter Attenuator Select (Tx, Rx, or Disabled) (Port n)
I
Loopback Control (Port n)
Ipd
Loopback Select (all ports)
8-/16-BIT PARALLEL INTERFACE
I
Chip Select (Active Low)
I
Read Enable (Active Low)/Data Strobe (Active Low)
I
Write Enable (Active Low)/Read/Write Select
I
Address Latch Enable
I
Address Bus (Excluding LSB)
I
Address Bus LSB/Byte Swap
I/O
Data Bus [15:0]
Oz
Ready/Acknowledge (Active Low)
Oz
Interrupt (Active Low)
I/Opd
General-Purpose I/O A (Port n)
I/Opd
General-Purpose I/O B (Port n)
SPI SERIAL INTERFACE
I
Chip Select (Active Low)
I
Serial Clock
I
Serial Data Input
O
Serial Data Output
I
Clock Phase
I
Clock Polarity
Oz
Interrupt Output (Active Low)
I/Opd
General-Purpose I/O A (Port n)
I/Opd
General-Purpose I/O B (Port n)
CLAD
I
Reference Clock
I/O
Clock A—DS3 44.736MHz
I/O
Clock B—E3 34.368MHz
I/O
Clock C—STS-1 51.84MHz
O
Clock D—Telecom Bus 77.76MHz or 19.44MHz
I
CLAD Bypass
JTAG
I
JTAG Clock
IPU
JTAG Mode Select
IPU
JTAG Data Input
Oz
JTAG Data Output
IPU
JTAG Reset (Active Low)
POWER SUPPLY AND GROUND PINS
VDD18
P
Digital Core 1.8V Power, 1.8V
±5%
VDD33
P
I/O 3.3V Power, 3.3V
±5%
VSS
P
Ground for VDD18 and VDD33
JVDDn
P
Jitter Attenuator 1.8V Power, 1.8V
±5% (Port n)
JVSSn
P
Jitter Attenuator Ground (Port n)
RVDDn
P
Receive 1.8V Power, 1.8V
±5% (Port n)
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DS32512NW 功能描述:网络控制器与处理器 IC RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流(最大值):595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray
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