
____________________________________________________ DS34T101, DS34T102, DS34T104, DS34T108
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PIN DESCRIPTION
positive integer (example: if N=16, it pulses every 2ms).
This pin is only active in external mode
(GCR1.MODE=1).
TDMn_TX_MF_CD
IOpd
TDMoP Transmit Multiframe Sync Input
When the interface type is configured for E1 or T1, multiframe sync is provided to
the TDMoP engine from this pin. The signal on this pin must pulse high for one
TDMn_TCLK cycle when the first bit the multiframe is expected to be present on
TDMoP Transmit Carrier Detect Output
When the interface type is configured for serial, the carrier detect function of this
pin is active. When
Port[n]_cfg_reg.CD_en=1, the state of this pin is controlled by
This pin is only active in external mode
(GCR1.MODE=1).
TDMn_TSIG_CTS
O
8mA
TDMoP Transmit Signaling Output
When the interface type is configured for E1 or T1, the transmit signaling function
TDMoP Clear to Send Output
When the interface type is configured for serial, the clear-to-send function of this
pin is active. In this mode, the state of this pin is controlled by the value stored in
This pin is only active in external mode
(GCR1.MODE=1).
TDMn_RCLK
Ipu
TDMoP Receive Clock Input
In two-clock mode, this signal clocks the receive TDM interface of the TDMoP
In one-clock mode, this signal is ignored, and the
TDMn_TCLK signal clocks both
the transmit and receive interfaces of the TDMoP engine.
TDM1_RCLK (port 1) is used in high speed E3/T3/STS1 mode.
This pin is only active in external mode
(GCR1.MODE=1).
TDMn_RX
Ipu
TDMoP Receive Data Input
Serial data to the TDMoP engine is input on this pin.
In two-clock mode, this signal is clocked by
TDMn_RCLK.In one-clock mode, this signal, is clocked by
TDMn_TCLK.TDM1_RX (port 1) is used in high speed E3/T3/STS1 mode.
This pin is only active in external mode
(GCR1.MODE=1).
TDMn_RX_SYNC
Ipd
TDMoP Receive Frame/Multiframe Sync Input
In two-clock mode, this signal is clocked by
TDMn_RCLK and specifies frame or
multiframe alignment for the receive interface of the TDMoP engine. The signal on
this pin must pulse high for one
TDMn_RCLK cycle when the first bit of a frame is