参数资料
型号: DS3514T+
厂商: Maxim Integrated Products
文件页数: 5/21页
文件大小: 0K
描述: IC I2C GAMMA/VCOM BUFF 48-TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 101
应用: TFT-LCD 面板:伽玛缓冲器,VCOM 驱动器
输出类型: 满摆幅
电路数: 14
电流 - 电源: 5mA
电流 - 输出 / 通道: 4mA
电压 - 电源,单路/双路(±): 9 V ~ 15 V
安装类型: 表面贴装
封装/外壳: 48-WFQFN 裸露焊盘
供应商设备封装: 48-TQFN-EP(7x7)
包装: 管件
产品目录页面: 1429 (CN2011-ZH PDF)
DS3514
or exceeds +150°C. In this state, the VCOM buffer is
disabled (output goes high impedance) until the junc-
tion temperature falls below +150°C.
Slave Address Byte and Address Pin
The slave address byte consists of a 7-bit slave
address plus a R/W bit (see Figure 5). The DS3514’s
slave address is determined by the state of the A0 pin.
This pin allows up to two devices to reside on the same
I2C bus. Connecting A0 to GND results in a 0 in the
corresponding bit position in the slave address.
Conversely, connecting A0 to VCC results in a 1 in the
corresponding bit position. For example, the DS3514’s
slave address byte is C0h when A0 is grounded. I2C
communication is described in detail in the
I2C Serial
Interface Description section.
ADDRESS
NAME
(HEX)
(DEC)
DESCRIPTION
TYPE
MEMORY
OR COMMAND
I2C
ACCESS
Latch A for VCOM Ch
0h
0
8-Bit I2C Data for VCOM DAC
Volatile
R/W
Latch A for GM1 Ch
2h, 3h
2, 3
10-Bit I2C Data for GM1 DAC
Volatile
R/W
Latch A for GM2 Ch
4h, 5h
4, 5
10-Bit I2C Data for GM2 DAC
Volatile
R/W
Latch A for GM3 Ch
6h, 7h
6, 7
10-Bit I2C Data for GM3 DAC
Volatile
R/W
Latch A for GM4 Ch
8h, 9h
8, 9
10-Bit I2C Data for GM4 DAC
Volatile
R/W
Latch A for GM5 Ch
Ah, Bh
10, 11
10-Bit I2C Data for GM5 DAC
Volatile
R/W
Latch A for GM6 Ch
Ch, Dh
12, 13
10-Bit I2C Data for GM6 DAC
Volatile
R/W
Latch A for GM7 Ch
Eh, Fh
14, 15
10-Bit I2C Data for GM7 DAC
Volatile
R/W
Latch A for GM8 Ch
10h, 11h
16, 17
10-Bit I2C Data for GM8 DAC
Volatile
R/W
Latch A for GM9 Ch
12h, 13h
18, 19
10-Bit I2C Data for GM9 DAC
Volatile
R/W
Latch A for GM10 Ch
14h, 15h
20, 21
10-Bit I2C Data for GM10 DAC
Volatile
R/W
Latch A for GM11 Ch
16h, 17h
22, 23
10-Bit I2C Data for GM11 DAC
Volatile
R/W
Latch A for GM12 Ch
18h, 19h
24, 25
10-Bit I2C Data for GM12 DAC
Volatile
R/W
Memory Map
1
0
R/W
A0
0
MSB
LSB
SLAVE ADDRESS*
*THE SLAVE ADDRESS IS DETERMINED BY ADDRESS PIN A0.
Figure 5. DS3514 Slave Address Byte
Memory Organization
Memory Description
The list of registers/memory contained in the DS3514 is
shown in the
Memory Map section. Also shown for
each of the registers is the memory type, accessibility,
as well as the power-up default values for volatile loca-
tions and factory-programmed defaults for the non-
volatile locations. Additional information regarding
reading and writing the memory is located in the
I2C
Serial Interface Description section.
I2C Gamma and VCOM Buffer with EEPROM
______________________________________________________________________________________
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