参数资料
型号: DS3908N+T&R
厂商: Maxim Integrated Products
文件页数: 10/11页
文件大小: 0K
描述: IC POT DUAL DIGITAL 14-TDFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
接片: 64
电阻(欧姆): 100k
电路数: 2
温度系数: 标准值 50 ppm/°C
存储器类型: 非易失
接口: I²C(设备位址)
电源电压: 3 V ~ 5.5 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 14-WFDFN 裸露焊盘
供应商设备封装: 14-TDFN-EP(3x3)
包装: 带卷 (TR)
DS3908
Dual, 64-Position Nonvolatile Digital
Potentiometer with Buffered Outputs
8
_____________________________________________________________________
Writes to this register are similar to writes to the poten-
tiometer register. A stop condition must follow the write
to ensure that the EEPROM is modified. A repeated
start condition before a stop condition following a write
operation will prevent the settings from being stored in
EEPROM. (See the I2C Communication section for
more details.)
Write Protection
The write-protect pin has an internal pullup resistor. To
adjust the potentiometers’ position, this pin must be
grounded. This pin can be left floating or connected to
VCC to write protect the EEPROM memory. All registers
can be read when the device is write protected.
When writing to the DS3908, the potentiometer will
adjust to the new setting once it has acknowledged the
new data that is being written, and the EEPROM (used
to make the setting nonvolatile) will be written following
the stop condition at the end of the write command. To
change the setting without changing the EEPROM, ter-
minate the write with a repeated start condition before
the next stop condition occurs. Using a repeated start
condition prevents the 20ms (maximum) delay required
for the EEPROM write cycle to finish.
Programmable Amplifier Control
The gain of both DS3908 amplifiers is controlled by
writing to register address FBh. The most significant
nibble of the FBh address controls the PGA1 gain, and
the least significant nibble controls the PGA0 gain. The
format of each nibble is shown in the tables below:
Table 2. Programmable Amplifier Register
REGISTER FORMAT (BINARY)
ADDRESS
PGA1
PGA0
R*
G12
G11
G10
R*
G02
G01
G00
FBh
bit7
bit0
Default value = 11h.
*Reserved for future use, write to zeros.
Table 3. Programmable Amplifier Gain Codes
Gx2Gx1Gx0
AMPLIFIER GAIN (V/V)
00X
1
01X
2
1XX
4
X = Don’t care.
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