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参数资料
| 型号： | DS3930E+T&R |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 11/12页 |
| 文件大小： | 0K |
| 描述： | IC POT NV HEX I/O MEM 20-TSSOP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 接片： | 256 |
| 电阻（欧姆）： | 16.5k |
| 电路数： | 6 |
| 温度系数： | 标准值 ±250 ppm/°C |
| 存储器类型： | 非易失 |
| 接口： | I²C（设备位址） |
| 电源电压： | 2.7 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 20-TSSOP |
| 包装： | 带卷 (TR) |
DS3930
Hex Nonvolatile Potentiometer with
I/O and Memory
8
______________________________________________________________________
I/O Signals
The I/O pins can be used as general-purpose digital
I/O signals. The I/O pins have CMOS outputs with an
internal pullup resistor (see Figure 2). The I/O pins are
configured with the I/O Control register (F6h) and moni-
tored with the I/O State register (F7h). The I/O Control
register controls the state of the internal pullup resistor
(RI/O) with bits 7 to 4 and the I/O pin setting with bits 3
to 0 (see Table 1). The read-only values of the I/O State
register contains the values of the I/O pin setting bits of
the I/O Control register unless the I/O output is tri-stat-
ed. When the I/O is tri-stated the I/O State register will
read high or low depending on the external source on
the I/O pin. Since the I/O pins are controlled by EEP-
ROM, the number of writes is limited.
Memory
The memory map is shown in Table 2.
Table 2. Memory Map
ADDRESS
BIT
DEFAULT (HEX)
FUNCTION
00h to 3Fh
FF
64 bytes of general-purpose EEPROM
40h to EFh
FF
Reserved
F0h
FF
Controls potentiometer 0
F1h
FF
Controls potentiometer 1
F2h
FF
Controls potentiometer 2
F3h
FF
Controls potentiometer 3
F4h
FF
Controls potentiometer 4
F5h
FF
Controls potentiometer 5
F6h
0F
I/O Control
Bit 7
Set to 0 to enable I/O3 pullup, set to 1 to disable pullup
Bit 6
Set to 0 to enable I/O2 pullup, set to 1 to disable pullup
Bit 5
Set to 0 to enable I/O1 pullup, set to 1 to disable pullup
Bit 4
Set to 0 to enable I/O0 pullup, set to 1 to disable pullup
Bit 3
Sets I/O3 to 0 or 1
Bit 2
Sets I/O2 to 0 or 1
Bit 1
Sets I/O1 to 0 or 1
Bit 0
Sets I/O0 to 0 or 1
F7h
0X
I/O State
Bit 7
0
Bit 6
0
Bit 5
0
Bit 4
0
Bit 3
Contains state of I/O3 pin (read only)
Bit 2
Contains state of I/O2 pin (read only)
Bit 1
Contains state of I/O1 pin (read only)
Bit 0
Contains state of I/O0 pin (read only)
F8h to FFh
FF
Reserved
PULLUP CTRL
(I/O CONTROL
REGISTER)
(BITS 7 TO 4)
I/O PIN SETTING
(I/O CONTROL
REGISTER)
(BITS 3 TO 0)
I/O PIN OUTPUT
00
0
01
1
10
0
11
Pullup disabled (HI-Z)
Table 1. I/O Pin Truth Table
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