参数资料
型号: DS8005-KIT#
厂商: Maxim Integrated Products
文件页数: 9/20页
文件大小: 0K
描述: EVALUATION KIT FOR DS8005
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 1
主要目的: 接口,模拟前端(AFE)
已用 IC / 零件: DS8005
已供物品:
相关产品: DS8005-RRX+-ND - SMART CARD AFE DUAL 28SOIC
其它名称: 90-08005#KIT
Switching A/B Interfaces
One of the device’s key features is the ability to man-
age two card slots at the same time. The multiplexing
control signal SEL_AB is used to determine which inter-
face is active for communication, though it is possible
to leave both interfaces powered at the same time.
When switching between interfaces, the device pre-
serves the state of control signals CLKDIV1, CLKDIV2,
1.8V, 5V/3V, CMDVCC, and RSTIN by latching the pin
states. This allows the now inactive interface to stay
powered while the other interface is activated for com-
munication, and it also allows for fast switching
between card interfaces without the need for a card
deactivation and activation sequence. After switching
SEL_AB, the control signals CLKDIV1, CLKDIV2, 1.8V,
5V/3V, CMDVCC, and RSTIN must not be changed for
78s while the device latches the state of the pins for
the inactive interface. After the control signals are
latched, a 42s window is provided to change the control
inputs.
Note that the behavior of the OFF and OFF2 pins is
dependent on the SEL_AB pin. OFF always refers to
the active interface, and OFF2 always reports events
on the inactive interface. This allows the device to
monitor for card insertion and removal on both inter-
faces simultaneously. See Figure 10 for details on the
behavior of the SEL_AB, OFF, and OFF2 pins with
regard to card presence.
DS8005
Smart Card Interface
______________________________________________________________________________________
17
DS8005
TRANSPARENT
LATCH A
REG A
CLKA DIV
VCCA
CLKA
ENA
RSTA, I/OA, GNDA
1_8V, 5V/3V, CLKDIV1,
CLKDIV2, RST, I/O
SEL_AB
OFF
TRANSPARENT
LATCH B
REG B
CLKB DIV
VCCB
CLKB
PRESA
ENA
RSTB, I/OB, GNDB
TRANSITION
SENSOR
DELAY
SMART CARD
STATUS 1
PRESB
SMART CARD
STATUS 2
OFF2
1
0
1
0
Figure 10. Switching A/B Interfaces
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