- 您现在的位置：买卖IC网 > PDF目录1916 > DS8007A-EAG+ (Maxim Integrated Products)IC INTERFACE SMART CARD 48-LQFP PDF资料下载
参数资料
| 型号： | DS8007A-EAG+ |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 33/41页 |
| 文件大小： | 0K |
| 描述： | IC INTERFACE SMART CARD 48-LQFP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 104 |
| 应用： | 智能卡 |
| 接口： | 并联 |
| 电源电压： | 2.7 V ~ 6 V |
| 封装/外壳： | 48-LQFP |
| 供应商设备封装： | 48-LQFP（7x7） |
| 包装： | 管件 |
| 安装类型： | 表面贴装 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页当前第33页第34页第35页第36页第37页第38页第39页第40页第41页
DS8007A
Multiprotocol Dual Smart Card Interface
______________________________________________________________________________________
39
For the T = 0 protocol, only received characters without
parity errors are stored in the receive FIFO. When
UCR1.FIP = 1 during T = 0 reception, only those char-
acters with incorrect parity are stored to the receive
FIFO since the DS8007A is checking for inverse parity.
For the T = 1 protocol, the receive character is stored
to the FIFO no matter whether the parity checks cor-
rectly or not.
If the FIFO threshold enable bits FTE0 and FTE1 are set
to 1, the FIFO implements a programmable threshold
for the assertion of the RBF/TBE bits and the interrupt
line. In this mode, the internal FIFO length is forced to 8
bytes, and FL[2:0] (the programmable FIFO length bits)
determines the threshold value.
Characters are accumulated in the FIFO without setting
the RBF/TBE bits until the FIFO depth is greater than
the threshold value. As long as the used depth is
greater than the FL[2:0] value, the RBF/TBE bits (USR
and MSR) are set and the interrupt pin is asserted.
Reading the FIFO to a level less than or equal to the
threshold value resets the RBF/TBE bit and deasserts
the interrupt line.
Writing a zero or eight into the FL bits while the pro-
grammable threshold mode is enabled causes the
FIFO to behave as it does in nonprogrammable thresh-
old mode.
If the programmable FIFO depth is at its maximum (8
characters), the RBF/TBE bit is set when the eighth
character is received and written into the FIFO. If anoth-
er character is received while the FIFO is full, the over-
flow (OVR) status is set, and the new character
overwrites the previously received character.
If the programmable FIFO depth is set to zero, the
receipt of a single character sets RBF/TBE. Receiving
another character in this state sets the OVR bit and
overwrites the character.
The FIFO empty status bit (FE) operates as before. The
programmable threshold feature functions the same in
T = 0 and T = 1 modes.
Early Answer (EA)
If a start bit is detected on the I/O line during the ATR
between clock cycles 200–368 when the RSTx pin is
low and during the first 368 clock cycles after the RSTx
is high, it is recognized as an early answer (EA), and
the EA bit is set in the USR.EA register. When the EA bit
is set, INT is asserted.
During the early answer detection period, 46 clock
cycles sampling periods should be used to detect the
start bit and there is an undetected (uncertainty) period
of 32 clock cycles at the end for both cases (between
clock cycles 200–368 when the RSTx pin is low, and
the first 368 clock cycles after RSTx is high). Table 6
summarizes the status of the early answer bit. The
answer on the I/O line begins between 400 and 40,000
clock cycles after the rising edge of the RSTx signal.
Development and Technical
Support
The DS8007 evaluation kit (EV kit) is available to assist in
the development of designs using the DS8007/DS8007A
multiprotocol smart card interface. The EV kit can be
purchased directly from Maxim.
For technical support, go to https://support.maxim-
ic.com/micro.
WHEN START BIT
IS ASSERTED
EA BIT
STATUS
CHARACTER
RECEIVED
Between 0 and 200 clock
cycles when RSTx = low
0
No
Between 200 and 368 clock
cycles when RSTx = low
1
Yes
Between 368 and 400 clock
cycles when RSTx = low
0
Yes
Within the first 368 clock
cycles after RSTx = high
1
Yes
Between 368 and 400 clock
cycles after RSTx = high
0
Yes
Table 6. Early Answer Detection
相关PDF资料 |
PDF描述 |
|---|---|
| DS8023-RRX+ | IC INTERFACE SMART CARD 28-SOIC |
| DS80C310-ECG | IC MCU HI SPEED 25MHZ 44-TQFP |
| DS80C320-ECL/T&R | IC MCU HI SPEED 33MHZ 44-TQFP |
| DS80C390-FNR | IC MPU CAN DUAL HS IND 64-LQFP |
| DS80C400-FNY | IC MCU 75MHZ 16MB HP 100-LQFP |
相关代理商/技术参数 |
参数描述 |
|---|---|
| DS8007A-EAG+ | 功能描述:接口 - 专用 Multiprotocol Dual Smart Card Interface RoHS:否 制造商:Texas Instruments 产品类型:1080p60 Image Sensor Receiver 工作电源电压:1.8 V 电源电流:89 mA 最大功率耗散: 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:BGA-59 |
| DS8007A-EAG+T | 功能描述:接口 - 专用 Multiprotocol Dual Smart Card Interface RoHS:否 制造商:Texas Instruments 产品类型:1080p60 Image Sensor Receiver 工作电源电压:1.8 V 电源电流:89 mA 最大功率耗散: 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:BGA-59 |
| DS8007-ENG | 制造商:DALLAS 制造商全称:Dallas Semiconductor 功能描述:Multiprotocol Dual Smart Card Interface |
| DS8007-ENG+ | 功能描述:接口 - 专用 Multiprotocol Dual Smart Card Interface RoHS:否 制造商:Texas Instruments 产品类型:1080p60 Image Sensor Receiver 工作电源电压:1.8 V 电源电流:89 mA 最大功率耗散: 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:BGA-59 |
| DS8007-KIT | 功能描述:界面开发工具 DS8007 Eval Kit RoHS:否 制造商:Bourns 产品:Evaluation Boards 类型:RS-485 工具用于评估:ADM3485E 接口类型:RS-485 工作电源电压:3.3 V |
发布紧急采购，3分钟左右您将得到回复。