- 您现在的位置：买卖IC网 > PDF目录1916 > DS8313-RRX+ (Maxim Integrated Products)IC INTERFACE SMART CARD 28-SOIC PDF资料下载
参数资料
| 型号： | DS8313-RRX+ |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 18/18页 |
| 文件大小： | 0K |
| 描述： | IC INTERFACE SMART CARD 28-SOIC |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 243 |
| 应用： | 智能卡 |
| 接口： | 模拟 |
| 电源电压： | 2.7 V ~ 6 V |
| 封装/外壳： | 28-SOIC（0.295"，7.50mm 宽） |
| 供应商设备封装： | 28-SOIC W |
| 包装： | 管件 |
| 安装类型： | 表面贴装 |
Voltage Supervisor
The voltage supervisor monitors the VDD supply. A
220s reset pulse (tW) is used internally to keep the
device inactive during power-on or power-off of the
VDD supply. See Figure 2.
The DS8313/DS8314 card interface remains inactive
regardless of the levels on the command lines until
duration tW after VDD has reached a level higher than
VTH2 + VHYS2. When VDD falls below VTH2, the
DS8313/DS8314 execute a card deactivation sequence
if their card interface is active.
Clock Circuitry
The card clock signal (CLK) is derived from a clock sig-
nal input to XTAL1 or from a crystal operating at up to
20MHz connected between XTAL1 and XTAL2. The
output clock frequency of CLK is selectable through
inputs CLKDIV1 and CLKDIV2. The CLK signal frequen-
cy can be fXTAL, fXTAL/2, fXTAL/4, or fXTAL/8. See Table
1 for the frequency generated on the CLK signal given
the inputs to CLKDIV1 and CLKDIV2.
Note that CLKDIV1 and CLKDIV2 must not be changed
simultaneously; a delay of 10ns minimum between
changes is needed. The minimum duration of any state
of CLK is eight periods of XTAL1.
The frequency change is synchronous: during a transition
of the clock divider, no pulse is shorter than 45% of the
smallest period, and the first and last clock pulses about
the instant of change have the correct width. When
changing the frequency dynamically, the change is effec-
tive for only eight periods of XTAL1 after the command.
The fXTAL duty factor depends on the input signal on
XTAL1. To reach a 45% to 55% duty factor on CLK,
XTAL1 should have a 48% to 52% duty factor with tran-
sition times less than 5% of the period.
With a crystal, the duty factor on CLK can be 45% to
55% depending on the circuit layout and on the crystal
characteristics and frequency. In other cases, the duty
factor on CLK is guaranteed between 45% and 55% of
the clock period.
I/O Transceivers
I/O and I/OIN are pulled high with an 11k
Ω resistor (I/O
to VCC and I/OIN to VDD) in the inactive state. The first
side of the transceiver to receive a falling edge
becomes the master. When a falling edge is detected
(and the master is decided), the detection of falling
edges on the line of the other side is disabled; that side
then becomes a slave. After a time delay tD(EDGE), an n
transistor on the slave side is turned on, thus transmit-
ting the logic 0 present on the master side.
When the master side asserts a logic 1, a p transistor
on the slave side is activated during the time delay tPU
and then both sides return to their inactive (pulled up)
states. This active pullup provides fast low-to-high tran-
sitions. After the duration of tPU, the output voltage
depends only on the internal pullup resistor and the
load current. Current to and from the card I/O lines is
limited internally to 15mA. The maximum frequency on
these lines is 1MHz.
Inactive Mode
The DS8313/DS8314 power up with the card interface
in the inactive mode. Minimal circuitry is active while
waiting for the host to initiate a smart card session.
All card contacts are inactive (approximately 200
Ω
to GND).
The I/OIN pin in the high-impedance state (11k
Ω
pullup resistor to VDD).
Voltage generators are stopped.
XTAL oscillator is running (if included in the device).
Voltage supervisor is active.
The internal oscillator is running at its low frequency.
Activation Sequence
After power-on and the reset delay, the host microcon-
troller can monitor card presence with signals OFF and
CMDVCC, as shown in Table 2.
DS8313/DS8314
Smart Card Interface
_______________________________________________________________________________________
9
Table 1. Clock Frequency Selection
CLKDIV1
CLKDIV2
fCLK
0
fXTAL/8
0
1
fXTAL/4
1
fXTAL/2
1
0
fXTAL
Table 2. Card Presence Indication
OFF
CMDVCC
STATUS
High
Card present.
Low
High
Card not present.
相关PDF资料 |
PDF描述 |
|---|---|
| DS8500-JND+T&R | IC MODEM HART SGL 3.6V 20-TQFN |
| DS87C520-ENL | IC MCU EPROM/ROM 33MH IND 44TQFP |
| DS87C530-ECL+ | IC MCU EPR/ROM W/RTC 33MZ 52TQFP |
| DS87C530-KCL | IC MCU EPR/ROM W/RTC 33MZ 52CLCC |
| DS87C550-QCL+ | IC MCU EPROM ADC/PWM HS 68-PLCC |
相关代理商/技术参数 |
参数描述 |
|---|---|
| DS8313-RRX+ | 功能描述:接口 - 专用 Smart Card Interface RoHS:否 制造商:Texas Instruments 产品类型:1080p60 Image Sensor Receiver 工作电源电压:1.8 V 电源电流:89 mA 最大功率耗散: 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:BGA-59 |
| DS8314 | 制造商:MAXIM 制造商全称:Maxim Integrated Products 功能描述:Smart Card Interface |
| DS8314L-RRX+ | 制造商:MAXIM 制造商全称:Maxim Integrated Products 功能描述:Smart Card Interface |
| DS8314-RRX+ | 制造商:MAXIM 制造商全称:Maxim Integrated Products 功能描述:Smart Card Interface |
| DS833 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Analog IC |
发布紧急采购，3分钟左右您将得到回复。