参数资料
型号: DS89C430-QNL+
厂商: Maxim Integrated Products
文件页数: 25/46页
文件大小: 0K
描述: IC MCU FLASH 16KB 33MHZ 44-PLCC
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 26
系列: 89C
核心处理器: 8051
芯体尺寸: 8-位
速度: 33MHz
连通性: EBI/EMI,SIO,UART/USART
外围设备: 电源故障复位,WDT
输入/输出数: 32
程序存储器容量: 16KB(16K x 8)
程序存储器类型: 闪存
RAM 容量: 1K x 8
电压 - 电源 (Vcc/Vdd): 4.5 V ~ 5.5 V
振荡器型: 外部
工作温度: -40°C ~ 85°C
封装/外壳: 44-LCC(J 形引线)
包装: 管件
产品目录页面: 703 (CN2011-ZH PDF)
DS89C430/DS89C450 Ultra-High-Speed Flash Microcontrollers
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Note that there are a few exceptions for this mode of operation when PAGES1 and PAGES2 are set to 00b:
PSEN
is asserted for both a page hit and a page miss for a full clock cycle.
The execution of external MOVX instruction causes a page miss.
A page miss occurs when fetching the next external instruction following the execution of an external MOVX
instruction.
Figure 10 shows the external memory cycle for this bus structure. The first case illustrates a back-to-back
execution sequence for the one-cycle page mode (PAGES1 = PAGES0 = 0b). PSEN remains active during page hit
cycles, and page misses are forced during and after MOVX executions, independent of the most significant byte of
the subsequent addresses. The second case illustrates a MOVX execution sequence for two-cycle page mode
(PAGES1 = 0 and PAGES0 = 1). PSEN is active for a full clock cycle in code fetches. Note that changing the most
significant byte of the data address causes the page misses in this sequence. The third case illustrates a MOVX
execution sequence for four-cycle page mode (PAGES1 = 1 and PAGES0 = 0). There is no page miss in this
execution cycle as the most significant byte of the data address is assumed to match the last program address.
The second page mode (page mode 2) external bus structure multiplexes the most significant address byte with
data on P2 and uses P0 for the least significant address byte. This bus structure is used to speed up external code
fetches only. External data memory access cycles are identical to the nonpage mode except for the different
signals on P0 and P2. Figure 11 illustrates the memory cycle for external code fetches.
Figure 11. Page Mode 2, External Code Fetch Cycle (CD1:CD0 = 10)
Internal Memory Cycles
C2
C3 C4
C1
C2
C1 C2
XTAL1
ALE
Port 0
Port 2
PSEN
C1
Ext Code Fetches
Page Miss
Page Hit
Data
LSB Add
Data
MSB Add
Stretch External Data Memory Cycle in Page Mode
The DS89C430 allows software to adjust the speed of external data memory access by stretching the memory bus
cycle in page mode operation just like nonpage mode operation. The following tables summarize the stretch values
and their effect on the external MOVX memory bus cycle and the control signals’ pulse width in terms of the
number of oscillator clocks. A stretch machine cycle always contains four system clocks, independent of the logic
value of the page mode select bits.
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相关代理商/技术参数
参数描述
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DS89C430-QNL+ 制造商:Maxim Integrated Products 功能描述:IC 8BIT MCU 8051 33MHZ LCC-44
DS89C440 制造商:DALLAS 制造商全称:Dallas Semiconductor 功能描述:Ultra-High-Speed Flash Microcontrollers
DS89C440-ENG 功能描述:IC MCU FLASH 32KB 25MHZ 44-TQFP RoHS:否 类别:集成电路 (IC) >> 嵌入式 - 微控制器, 系列:89C 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:260 系列:73S12xx 核心处理器:80515 芯体尺寸:8-位 速度:24MHz 连通性:I²C,智能卡,UART/USART,USB 外围设备:LED,POR,WDT 输入/输出数:9 程序存储器容量:64KB(64K x 8) 程序存储器类型:闪存 EEPROM 大小:- RAM 容量:2K x 8 电压 - 电源 (Vcc/Vdd):2.7 V ~ 5.5 V 数据转换器:- 振荡器型:内部 工作温度:-40°C ~ 85°C 封装/外壳:68-VFQFN 裸露焊盘 包装:管件
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