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参数资料
| 型号： | DS90CF363BMT/NOPB |
| 厂商： | National Semiconductor |
| 文件页数： | 10/15页 |
| 文件大小： | 0K |
| 描述： | IC FPD-LINK TX 18BIT 48-TSSOP |
| 标准包装： | 38 |
| 类型： | 发射器 |
| 驱动器/接收器数： | 21/3 |
| 规程： | FPD 链路，LVDS |
| 电源电压： | 3 V ~ 3.6 V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-TFSOP（0.240"，6.10mm 宽） |
| 供应商设备封装： | 48-TSSOP |
| 包装： | 管件 |
| 产品目录页面： | 1280 (CN2011-ZH PDF) |
| 其它名称： | DS90CF363BMT |
SNLS180D – JULY 2004 – REVISED APRIL 2013
Transmitter Switching Characteristics (continued)
Over recommended operating supply and temperature ranges unless otherwise specified
Symbol
Parameter
Min
Typ
Max
Units
TPPos0
Transmitter Output Pulse Position for Bit 0 (Figure 12 )(1)
f = 40
0.25
0
+0.25
ns
MHz
TPPos1
Transmitter Output Pulse Position for Bit 1
3.32
3.57
3.82
ns
TPPos2
Transmitter Output Pulse Position for Bit 2
6.89
7.14
7.39
ns
TPPos3
Transmitter Output Pulse Position for Bit 3
10.46
10.71
10.96
ns
TPPos4
Transmitter Output Pulse Position for Bit 4
14.04
14.29
14.54
ns
TPPos5
Transmitter Output Pulse Position for Bit 5
17.61
17.86
18.11
ns
TPPos6
Transmitter Output Pulse Position for Bit 6
21.18
21.43
21.68
ns
TPPos0
Transmitter Output Pulse Position for Bit 0 (Figure 12 )(1)
f =
0.45
0
+0.45
ns
25MHz
TPPos1
Transmitter Output Pulse Position for Bit 1
5.26
5.71
6.16
ns
TPPos2
Transmitter Output Pulse Position for Bit 2
10.98
11.43
11.88
ns
TPPos3
Transmitter Output Pulse Position for Bit 3
16.69
17.14
17.59
ns
TPPos4
Transmitter Output Pulse Position for Bit 4
22.41
22.86
23.31
ns
TPPos5
Transmitter Output Pulse Position for Bit 5
28.12
28.57
29.02
ns
TPPos6
Transmitter Output Pulse Position for Bit 6
33.84
34.29
34.74
ns
TSTC
TxIN Setup to TxCLK IN (Figure 7 )
2.5
ns
THTC
TxIN Hold to TxCLK IN (Figure 7 )
0.5
ns
TCCD
TxCLK IN to TxCLK OUT Delay (Figure 8 ) 50% duty cycle input clock is assumed, T
3.011
6.082
ns
A= 10°C, and 65MHz for " Min ", T A = 70°C, and 25MHz for " Max ", VCC = 3.6V
SSCG
Spread Spectrum Clock support; Modulation frequency with a linear
f = 25
100KHz ±
profile (2)
MHz
2.5%/
5%
f = 40
100KHz ±
MHz
2.5%/
5%
f = 65
100KHz ±
MHz
2.5%/
5%
TPLLS
Transmitter Phase Lock Loop Set (Figure 9 )
10
ms
TPDD
Transmitter Power Down Delay (Figure 11 )
100
ns
(2)
Care must be taken to ensure TSTC and THTC are met so input data are sampling correctly. This SSCG parameter only shows the
performance of tracking Spread Spectrum Clock applied to TxCLK IN pin, and reflects the result on TxCLKOUT+ and TxCLK
pins.
AC Timing Diagrams
Figure 2. “Worst Case” Test Pattern
4
Copyright 2004–2013, Texas Instruments Incorporated
Product Folder Links: DS90CF363B
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相关代理商/技术参数 |
参数描述 |
|---|---|
| DS90CF363BMTX | 功能描述:LVDS 接口集成电路 RoHS:否 制造商:Texas Instruments 激励器数量:4 接收机数量:4 数据速率:155.5 Mbps 工作电源电压:5 V 最大功率耗散:1025 mW 最大工作温度:+ 85 C 封装 / 箱体:SOIC-16 Narrow 封装:Reel |
| DS90CF363BMTX/NOPB | 功能描述:LVDS 接口集成电路 RoHS:否 制造商:Texas Instruments 激励器数量:4 接收机数量:4 数据速率:155.5 Mbps 工作电源电压:5 V 最大功率耗散:1025 mW 最大工作温度:+ 85 C 封装 / 箱体:SOIC-16 Narrow 封装:Reel |
| DS90CF363MTD | 制造商:NSC 制造商全称:National Semiconductor 功能描述:+3.3V LVDS Transmitter 18-Bit Flat Panel Display (FPD) LinkΑ65 MHz |
| DS90CF363MTDX | 功能描述:IC TX PROG LVDS 3.3V 48-TSSOP RoHS:否 类别:集成电路 (IC) >> 接口 - 驱动器，接收器，收发器 系列:- 标准包装:1,000 系列:- 类型:收发器 驱动器/接收器数:2/2 规程:RS232 电源电压:3 V ~ 5.5 V 安装类型:表面贴装 封装/外壳:16-SOIC（0.295"，7.50mm 宽） 供应商设备封装:16-SOIC 包装:带卷 (TR) |
| DS90CF364 | 制造商:NSC 制造商全称:National Semiconductor 功能描述:+3.3V LVDS Receiver 24-Bit Flat Panel Display (FPD) LinkΑ65 MHz, +3.3V LVDS Receiver 18-Bit Flat Panel Display (FPD) LinkΑ65 MHz |
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