
SNLS195L – SEPTEMBER 2005 – REVISED APRIL 2013
Recommended Operating Conditions
Supply Voltage (VCC)
3.15V to 3.45V
Input Voltage (VI)
(1)
0V to VDD
Output Voltage (VO)
0V to VDD
Operating Temperature (TA)
Industrial
40°C to +85°C
(1)
VID max < 2.4V
Electrical Characteristics
Over recommended operating supply and temperature ranges unless other specified.
Symbol
Parameter
Conditions
Min
Typ(1)
Max
Units
LVTTL DC SPECIFICATIONS (EN)
VIH
High Level Input Voltage
2.0
VDD
V
VIL
Low Level Input Voltage
GND
0.8
V
IIH
High Level Input Current
VIN = VDD = VDDMAX
10
+10
A
IIL
Low Level Input Current
VIN = VSS, VDD = VDDMAX
10
+10
A
CIN1
Input Capacitance
Any Digital Input Pin to VSS
3.5
pF
VCL
Input Clamp Voltage
ICL = 18 mA
1.5
0.8
V
LVDS INPUT DC SPECIFICATIONS (INn±)
VTH
VCM = 0.8V to 3.4V,
Differential Input High Threshold(2)
0
100
mV
VDD = 3.45V
VTL
VCM = 0.8V to 3.4V,
Differential Input Low Threshold(2)
100
0
mV
VDD = 3.45V
VID
Differential Input Voltage
VCM = 0.8V to 3.4V, VDD = 3.45V
100
2400
mV
VCMR
Common Mode Voltage Range
VID = 150 mV, VDD = 3.45V
0.05
3.40
V
CIN2
Input Capacitance
IN+ or IN
to VSS
3.5
pF
IIN
VIN = 3.45V, VDD = VDDMAX
10
+10
A
Input Current
VIN = 0V, VDD = VDDMAX
10
+10
A
LVDS OUTPUT DC SPECIFICATIONS (OUTn±)
VOD
Differential Output Voltage(2)
250
500
600
mV
ΔVOD
Change in VOD between
35
mV
Complementary States
RL = 100 external resistor between OUT+ and
OUT
VOS
Offset Voltage(3)
1.05
1.18
1.475
V
ΔVOS
Change in VOS between
35
mV
Complementary States
IOS
Output Short Circuit Current
OUT+ or OUT
Short to GND
60
90
mA
COUT2
Output Capacitance
OUT+ or OUT
to GND when TRI-STATE
5.5
pF
SUPPLY CURRENT (Static)
ICC
All inputs and outputs enabled and active,
Total Supply Current
terminated with external differential load of 100
117
140
mA
between OUT+ and OUT-.
ICCZ
TRI-STATE Supply Current
EN = 0V
2.7
6
mA
(1)
Typical parameters are measured at VDD = 3.3V, TA = 25°C. They are for reference purposes, and are not production-tested.
(2)
Differential output voltage VOD is defined as ABS(OUT+–OUT). Differential input voltage VID is defined as ABS(IN+–IN).
(3)
Output offset voltage VOS is defined as the average of the LVDS single-ended output voltages at logic high and logic low states.
Copyright 2005–2013, Texas Instruments Incorporated
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