参数资料
型号: DSP56F801FA80E
厂商: Freescale Semiconductor
文件页数: 18/48页
文件大小: 0K
描述: IC DSP 60MHZ 16KB FLASH 48-LQFP
标准包装: 250
系列: 56F8xx
核心处理器: 56800
芯体尺寸: 16-位
速度: 80MHz
连通性: SCI,SPI
外围设备: POR,PWM,WDT
输入/输出数: 11
程序存储器容量: 20KB(10K x 16)
程序存储器类型: 闪存
RAM 容量: 2K x 16
电压 - 电源 (Vcc/Vdd): 3 V ~ 3.6 V
数据转换器: A/D 8x12b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 48-LQFP
包装: 托盘
External Clock Operation
56F801 Technical Data, Rev. 17
Freescale Semiconductor
25
3.5.3
External Clock Source
The recommended method of connecting an external clock is given in Figure 3-9. The external clock
source is connected to XTAL and the EXTAL pin is grounded.
Figure 3-9 Connecting an External Clock Signal
Figure 3-10 External Clock Timing
3.5.4
Use of On-Chip Relaxation Oscillator
An internal relaxation oscillator can supply the reference frequency when an external frequency source or
crystal are not used. During a 56F801 boot or reset sequence, the relaxation oscillator is enabled by default,
and the PRECS bit in the PLLCR word is set to 0 (Section 3.5). If an external oscillator is connected, the
relaxation oscillator can be deselected instead by setting the PRECS bit in the PLLCR to 1. When this
occurs, the PRECSS bit in the PLLSR (prescaler clock select status register) data word also sets to 1. If a
changeover between internal and external oscillators is required at startup, internal device circuits
Table 3-8 External Clock Operation Timing Requirements3
Operating Conditions: V
SS = VSSA = 0 V, VDD = VDDA = 3.0–3.6 V, TA = –40° to +85°C
Characteristic
Symbol
Min
Typ
Max
Unit
Frequency of operation (external clock driver)1
1.
See Figure 3-9 for details on using the recommended connection of an external clock driver.
fosc
0—
802
2.
May not exceed 60MHz for the DSP56F801FA60 device.
3.
The high or low pulse width must be no smaller than 6.25ns or the chip will not function. However, the high pulse width
does not have to be any particular percent of the low pulse width.
4.
Parameters listed are guaranteed by design.
MHz
Clock Pulse Width3, 4
tPW
6.25
ns
56F801
XTAL
EXTAL
External Clock
VSS
External
Clock
VIH
VIL
Note: The midpoint is VIL + (VIH – VIL)/2.
90%
50%
10%
90%
50%
10%
tPW
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