参数资料
型号: DSP56F801FA80E
厂商: Freescale Semiconductor
文件页数: 19/48页
文件大小: 0K
描述: IC DSP 60MHZ 16KB FLASH 48-LQFP
标准包装: 250
系列: 56F8xx
核心处理器: 56800
芯体尺寸: 16-位
速度: 80MHz
连通性: SCI,SPI
外围设备: POR,PWM,WDT
输入/输出数: 11
程序存储器容量: 20KB(10K x 16)
程序存储器类型: 闪存
RAM 容量: 2K x 16
电压 - 电源 (Vcc/Vdd): 3 V ~ 3.6 V
数据转换器: A/D 8x12b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 48-LQFP
包装: 托盘
56F801 Technical Data, Rev. 17
26
Freescale Semiconductor
compensate for any asynchronous transitions between the two clock signals so that no glitches occur in the
resulting master clock to the chip. When changing clocks, the user must ensure that the clock source is not
switched until the desired clock is enabled and stable.
To compensate for variances in the device manufacturing process, the accuracy of the relaxation oscillator
can be incrementally adjusted to within
±0.25% of 8MHz by trimming an internal capacitor. Bits 0-7 of
the IOSCTL (internal oscillator control) word allow the user to set in an additional offset (trim) to this
preset value to increase or decrease capacitance. The default value of this trim is 128 units, making the
power-up default capacitor size 432 units. Each unit added or deleted changes the output frequency by
about 0.2%, allowing incremental adjustment until the desired frequency accuracy is achieved.
Table 3-9 Relaxation Oscillator Characteristics
Operating Conditions: V
SS = VSSA = 0 V, VDD = VDDA = 3.0–3.6 V, TA = –40° to +85°C
Characteristic
Symbol
Min
Typ
Max
Unit
Frequency Accuracy1
1.
Over full temperature range.
Δf—
+2+5%
Frequency Drift over Temp
Δf/Δt—
+0.1
%/oC
Frequency Drift over Supply
Δf/ΔV—
0.1
%/V
Trim Accuracy
Δf
T
—+0.25
%
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