参数资料
型号: DSP56F826BU80
厂商: Freescale Semiconductor
文件页数: 23/56页
文件大小: 0K
描述: IC DSP 80MHZ 64KB FLASH 100LQFP
标准包装: 90
系列: 56F8xx
核心处理器: 56800
芯体尺寸: 16-位
速度: 80MHz
连通性: EBI/EMI,SCI,SPI,SSI
外围设备: POR,WDT
输入/输出数: 46
程序存储器容量: 67KB(33.5K x 16)
程序存储器类型: 闪存
RAM 容量: 4.5K x 16
电压 - 电源 (Vcc/Vdd): 2.25 V ~ 2.75 V
振荡器型: 外部
工作温度: -40°C ~ 85°C
封装/外壳: 100-LQFP
包装: 托盘
56F826 Technical Data, Rev. 14
Freescale Semiconductor
3
56F826 Block Diagram
JTAG/
OnCE
Port
Program Controller
and
Hardware Looping Unit
Data ALU
16 x 16 + 36
→ 36-Bit MAC
Three 16-bit Input Registers
Two 36-bit Accumulators
Address
Generation
Unit
Bit
Manipulation
Unit
PLL
Clock Gen
16-Bit
56800
Core
PAB
PDB
XDB2
CGDB
XAB1
XAB2
XTAL
EXTAL
INTERRUPT
CONTROLS
IPBB
CONTROLS
IPBus Bridge
(IPBB)
MODULE CONTROLS
ADDRESS BUS [8:0]
DATA BUS [15:0]
COP
RESET
Applica-
tion-Specific
Memory &
Peripherals
Interrupt
Controller
Program Memory
32252 x 16 Flash
512 x 16 SRAM
Boot Flash
2048 x 16 Flash
Data Memory
2048 x 16 Flash
4096 x 16 SRAM
COP/
Watchdog
SCI0 & SCI1
or
SPI0
SSI
or
GPIO
Quad Timer
or
GPIO
4
6
4
16
VDDIO VSSIO VDDA VSSA
6
44
SPI1
or
GPIO
4
Dedicated
GPIO
16
External
Bus
Interface
Unit
External
Address Bus
Switch
Bus
Control
External
Data Bus
Switch
RD Enable
WR Enable
DS Select[1]
PS Select[0]
16
D[00:15]
A[00:15]
or
GPIO
CLKO
RESET
IRQA
IRQB
EXTBOOT
VDD
VSS
3
4
TOD
Timer
Low Voltage Supervisor
Analog Reg
56F826 General Description
Up to 40 MIPS at 80MHz core frequency
DSP and MCU functionality in a unified,
C-efficient architecture
Hardware DO and REP loops
MCU-friendly instruction set supports both DSP
and controller functions: MAC, bit manipulation
unit, 14 addressing modes
31.5K
× 16-bit words (64KB) Program Flash
512
× 16-bit words (1KB) Program RAM
2K
× 16-bit words (4KB) Data Flash
4K
× 16-bit words (8KB) Data RAM
2K
× 16-bit words (4KB) BootFLASH
Up to 64K
× 16-bit words each of external memory
expansion for Program and Data memory
One Serial Port Interface (SPI)
One additional SPI or two optional Serial
Communication Interfaces (SCI)
One Synchronous Serial Interface (SSI)
One General Purpose Quad Timer
JTAG/OnCE
for debugging
100-pin LQFP Package
16 dedicated and 30 shared GPIO
Time-of-Day (TOD) Timer
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