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参数资料
型号： DSPIC30F3014-30I/ML
厂商： Microchip Technology
文件页数： 145/153页
文件大小： 0K
描述： IC DSPIC MCU/DSP 24K 44QFN
产品培训模块： Serial Communications using dsPIC30F I2C
Serial Communications using dsPIC30F SPI
Serial Communications using dsPIC30F UART
dsPIC30F 12 bit ADC - Part 2
dsPIC30F Addressing Modes - Part 1
dsPIC30F Architecture - Part 1
dsPIC30F DSP Engine & ALU
dsPIC30F Interrupts
dsPIC30F Motor Control PWM
dsPIC Timers
Asynchronous Stimulus
dsPIC30F Addressing Modes - Part 2
dsPIC30F Architecture - Part 2
dsPIC30F 12-bit ADC Part 1
标准包装： 45
系列： dsPIC™ 30F
核心处理器： dsPIC
芯体尺寸： 16-位
速度： 30 MIP
连通性： I²C，SPI，UART/USART
外围设备： 欠压检测/复位，POR，PWM，WDT
输入/输出数： 30
程序存储器容量： 24KB（8K x 24）
程序存储器类型： 闪存
EEPROM 大小： 1K x 8
RAM 容量： 2K x 8
电压 - 电源 (Vcc/Vdd)： 2.5 V ~ 5.5 V
数据转换器： A/D 13x12b
振荡器型： 内部
工作温度： -40°C ~ 85°C
封装/外壳： 44-VQFN 裸露焊盘
包装： 管件
产品目录页面： 651 (CN2011-ZH PDF)
配用： XLT44QFN2-ND - SOCKET TRAN ICE 44QFN/40DIP
AC164322-ND - MODULE SOCKET MPLAB PM3 28/44QFN
DV164005-ND - KIT ICD2 SIMPLE SUIT W/USB CABLE
其它名称： DSPIC30F301430IML
2010 Microchip Technology Inc.
DS70138G-page 91
dsPIC30F3014/4013
14.0
I2C MODULE
The Inter-Integrated Circuit (I2CTM) module provides
complete hardware support for both Slave and Multi-
Master modes of the I2C serial communication
standard with a 16-bit interface.
This module offers the following key features:
I2C interface supporting both master and slave
operation.
I2C Slave mode supports 7-bit and 10-bit address-
ing.
I2C Master mode supports 7-bit and 10-bit
addressing.
I2C port allows bidirectional transfers between
master and slaves.
Serial clock synchronization for I2C port can be
used as a handshake mechanism to suspend and
resume serial transfer (SCLREL control).
I2C supports multi-master operation; detects bus
collision and arbitrates accordingly.
14.1
Operating Function Description
The hardware fully implements all the master and slave
functions of the I2C Standard and Fast mode
specifications, as well as 7 and 10-bit addressing.
Thus, the I2C module can operate either as a slave or
a master on an I2C bus.
14.1.1
VARIOUS I2C MODES
The following types of I2C operation are supported:
I2C slave operation with 7-bit addressing
I2C slave operation with 10-bit addressing
I2C master operation with 7-bit or 10-bit addressing
See the I2C programmer’s model in Figure 14-1.
14.1.2
PIN CONFIGURATION IN I2C MODE
I2C has a 2-pin interface: the SCL pin is clock and the
SDA pin is data.
14.1.3
I2C REGISTERS
I2CCON and I2CSTAT are control and status registers,
respectively. The I2CCON register is readable and writ-
able. The lower 6 bits of I2CSTAT are read-only. The
remaining bits of the I2CSTAT are read/write.
I2CRSR is the shift register used for shifting data,
whereas I2CRCV is the buffer register to which data
bytes are written, or from which data bytes are read.
I2CRCV is the receive buffer as shown in Figure 14-1.
I2CTRN is the transmit register to which bytes are
written during a transmit operation, as shown in
Figure 14-2.
The I2CADD register holds the slave address. A status
bit, ADD10, indicates 10-Bit Addressing mode. The
I2CBRG acts as the Baud Rate Generator reload
value.
In receive operations, I2CRSR and I2CRCV together
form a double-buffered receiver. When I2CRSR
receives a complete byte, it is transferred to I2CRCV
and
an
interrupt
pulse
is
generated.
During
transmission, the I2CTRN is not double-buffered.
FIGURE 14-1:
PROGRAMMER’S MODEL
Note:
This data sheet summarizes features of
this group of dsPIC30F devices and is not
intended to be a complete reference
source. For more information on the CPU,
peripherals,
register
descriptions
and
general device functionality, refer to the
'dsPIC30F Family Reference Manual'
(DS70046).
Note:
Following a Restart condition in 10-bit
mode, the user only needs to match the
first 7-bit address.
Bit 7
Bit 0
I2CRCV (8 bits)
Bit 7
Bit 0
I2CTRN (8 bits)
Bit 8
Bit 0
I2CBRG (9 bits)
Bit 15
Bit 0
I2CCON (16 bits)
Bit 15
Bit 0
I2CSTAT (16 bits)
Bit 9
Bit 0
I2CADD (10 bits)
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